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Heterogeneous Integrated Platform for Electronic system Redistribution: A revolutionary I/O Planning Solution for Micro/Nano 2.5-D Electronic Systems Design

Periodic Reporting for period 1 - HIPER (Heterogeneous Integrated Platform for Electronic system Redistribution: A revolutionary I/O Planning Solution for Micro/Nano 2.5-D Electronic Systems Design)

Reporting period: 2016-08-01 to 2016-11-30

HIPER is an ambitious project aiming towards developing and commercializing an advanced solution for the optimization of I/O Planning of 2.5-D micro/nano electronic systems. Without automated I/O Planning, 2.5-D micro/nano electronic systems cannot possibly be designed due to the complexity of this design phase and the need to connect several heterogeneous components (Integrated Circuits (ICs), Silicon Interposer, and Package). HIPER´s technical edge resides in being the only tool of its kind in the market capable of performing this task and thus it will be introduced as an enabling solution for the design of such systems. HIPER will reduce the electronic systems´ production costs by 30%, decrease design lead-time by 50% and improve the overall product performances (due to demonstrated 65% reduction in wire crossing and 80% reduction in total connections length). This will enable complex electronic components to be created with improved functionality at reduced cost.
The work has been undertaken under three strands. In the technical section we have continued to develop and test the software to ensure that we can meet the client targets in terms of delivery improvement as well as to assess the requirements for integration with other EDA providers.

In the financial section we have reassessed the financial feasibility to ensure that the product will be profitable in a timely manner and to understand the financial requirements for full development.

In the business plan section, we have undertaken a market study and developed the work plan to take the product through to commercial launch.
At this point in time there are no tools that automate I/O planning for electronic components in the context of the full electronic system/product. As electronic systems become more heterogeneous and complex this creates a real problem for developers who have to carefully plan the interfaces between these components. This can add significant time onto the development process and result in a sub-optimal design with increased wire crossings, wire length and cost. It also increases the chance of an error being made in design which can lead to significant costs in terms of either re-design or in the worst case a product recall.
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