HIPER is an ambitious project aiming towards developing and commercializing an advanced solution for the optimization of I/O Planning of 2.5-D micro/nano electronic systems. Without automated I/O Planning, 2.5-D micro/nano electronic systems cannot possibly be designed due to the complexity of this design phase and the need to connect several heterogeneous components (Integrated Circuits (ICs), Silicon Interposer, and Package). HIPER´s technical edge resides in being the only tool of its kind in the market capable of performing this task and thus it will be introduced as an enabling solution for the design of such systems. HIPER will reduce the electronic systems´ production costs by 30%, decrease design lead-time by 50% and improve the overall product performances (due to demonstrated 65% reduction in wire crossing and 80% reduction in total connections length). This will enable complex electronic components to be created with improved functionality at reduced cost.