In Lithography scanner improvements and new alignment modules have been developed by ASML to improve matching between the DUV and EUV scanners. A cross platform matched machine overlay (XMMO) of 1.9nm has been demonstrated. which matches the requirements for the 5nm node. The Hyper NA EUV system design has been completed resulting in a full system design specification and integration plan.
For the realization of the Hyper NA EUV mirrors Zeiss developed numerous innovative techniques for mirror manufacture and evaluation. The first large mirror has been grinded and polished.
IMS in cooperation with Zeiss have defined the specification parameters and measurement techniques for the X-large Diffractive Optical Elements (DOE). A first evaluations has been carried out. And a manufacturing process has been developed and implemented resulting in homogeneous feature profiles that are independent of the position on the DOE substrate and its layout.
In metrology, the focus has been on the development of through layers mapping and multi-dimensional metrology capabilities by Applied Materials Israel, Nova, Semilab, KLA-Tencor Israel, FEI and TNO. The techniques involved are Scanning Electron Microscopy (SEM) defect review tool, Scanning Transmission Electron Microscopy (STEM), X-ray Photo-emission Spectroscopy (XPS), Optical dark field, Enhanced Raman and Scanning Probe Microscopy (SPM). In addition, productivity improvement, such as throughput and predictive analysis, were achieved on a system level, and across multiple systems, with high performance computing and the development of smart algorithms.
The main exploitations for the metrology work package members is the new ‘through layer mapping’ and ‘multi-dimensional metrology’ capabilities for key critical parameters, such as Critical Dimensions, Overlay and defects characterization, for the 5nm technology node.
In Process Development, Integration and Demonstration for 5nm technology node the patterning and advanced metallization options assessment consolidated in the demonstration of a three metal-level damascene BEOL integration, including electrical qualification, implementing a TiN liner / Ru bulk metal metallization scheme. Module development for tall FinFET, the target device for 5nm node, has been completed including the integration of Buried Power Rail and Self-Aligned Gate Contact scaling boosters. High-chi Block Co-Polymers (BCP) have been successfully assessed for resolving sub 20nm DSA lines/spaces, including reduction of the dislocation density with 7 orders of magnitude.
