Memristive In-Memory Processing System

Project Information

Real-PIM-System

Grant agreement ID: 757259

DOI

10.3030/757259

Project closed

EC signature date 6 December 2017

Start date 1 January 2018

End date 31 December 2023

Funded under

• EXCELLENT SCIENCE - European Research Council (ERC)

Total cost

€ 1 500 000,00

EU contribution

€ 1 500 000,00

Coordinated by

TECHNION - ISRAEL INSTITUTE OF TECHNOLOGY
Israel

CORDIS provides links to public deliverables and publications of HORIZON projects.

Links to deliverables and publications from FP7 projects, as well as links to some specific result types such as dataset and software, are dynamically retrieved from OpenAIRE .

Publications

Conference proceedings (20)

Making Memristive Processing-in-Memory Reliable

Author(s): Orian Leitersdorf; Ronny Ronen; Shahar Kvatinsky
Published in: 28th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2021, ISBN 978-1-7281-8281-0
Publisher: IEEE
DOI: 10.1109/icecs53924.2021.9665596

Making Real Memristive Processing-in-Memory Faster and Reliable

Author(s): Shahar Kvatinsky
Published in: International Cellular Nanoscale Networks and their Applications, 2021, Page(s) pp. 1-3, ISBN 978-1-6654-3948-0
Publisher: IEEE
DOI: 10.1109/cnna49188.2021.9610786

Accelerating Relational Database Analytical Processing with Bulk-Bitwise Processing-in-Memory

Author(s): Ben Perach, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE interregional NEWCAS Conference, 2023
Publisher: IEEE

A Pipelined Memristive Neural Network Analog-to-Digital Converter

Author(s): Loai Danial, Kanishka Sharma, Shahar Kvatinsky
Published in: IEEE International Symposium on Circuits and Systems (ISCAS), 2020
Publisher: IEEE
DOI: 10.1109/iscas45731.2020.9181108

Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory

Author(s): Orian Leitersdorf; Ben Perach; Ronny Ronen; Shahar Kvatinsky
Published in: 58th ACM/IEEE Design Automation Conference (DAC), 2021, ISBN 978-1-6654-3274-0
Publisher: IEEE
DOI: 10.1109/dac18074.2021.9586324

On Consistency for Bulk-Bitwise Processing-in-Memory

Author(s): B. Perach, R. Ronen, and S. Kvatinsky
Published in: IEEE/ACM International Symposium on High-Performance Computer Architecture, 2023
Publisher: IEEE

Enhancing Security of Memristor Computing System Through Secure Weight Mapping

Author(s): Minhui Zou, Junlong Zhou, Xiaotong Cui, Wei Wang, Shahar Kvatinsky
Published in: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022
Publisher: IEEE

Performing Stateful Logic Using Spin-Orbit Torque (SOT) MRAM

Author(s): Barak Hoffer, Shahar Kvatinsky
Published in: IEEE International Conference on Nanotechnology (NANO), 2022
Publisher: IEEE

FiltPIM: In-Memory Filter for DNA Sequencing

Author(s): Marcel Khalifa, Rotem Ben-Hur, Ronny Ronen, Orian Leitersdorf, Leonid Yavits and Shahar Kvatinsky
Published in: IEEE International Conference on Electronics Circuits and Systems (ICECS), 2021, Page(s) pp. 1-6, ISBN 978-1-7281-8281-0
Publisher: IEEE
DOI: 10.1109/icecs53924.2021.9665570

abstractPIM: Bridging the Gap Between PIM Technology and ISA

Author(s): Adi Eliahu, Rotem Ben-Hur, Ronny Ronen, Shahar Kvatnsky
Published in: IFIP/IEEE VLSI-SoC, 2020, Page(s) pp. 28-33, ISBN 978-1-7281-5409-1
Publisher: IEEE
DOI: 10.1109/vlsi-soc46417.2020.9344103

MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic

Author(s): Orian Leitersdorf, Ronny Ronen, Shahar Kvatinsky
Published in: International Symposium on Circuits and Systems, 2022
Publisher: IEEE

X-MAGIC: Enhancing PIM Using Input Overwriting Capabilities

Author(s): Natan Peled; Rotem Ben-Hur; Ronny Ronen; Shahar Kvatinsky
Published in: IFIP/IEEE VLSI-SoC, Issue 1, 2020
Publisher: IEEE
DOI: 10.5281/zenodo.4023241

Efficient Algorithms for In-Memory Fixed Point Multiplication Using MAGIC

Author(s): Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Shahar Kvatinsky
Published in: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Page(s) 1-5, ISBN 978-1-5386-4881-0
Publisher: IEEE
DOI: 10.1109/iscas.2018.8351561

Real Processing-in-Memory with Memristive Memory Processing Unit (mMPU)

Author(s): Shahar Kvatinsky
Published in: 2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019, Page(s) 142-148, ISBN 978-1-7281-1601-3
Publisher: IEEE
DOI: 10.1109/asap.2019.00-10

A Dual-Band CMOS Low-Noise Amplifier using Memristor-Based Tunable Inductors

Author(s): Nicolas Wainstein, Tamir Tsabari, Yarden Goldin, Eilam Yalon, Shahar Kvatinsky
Published in: 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019, Page(s) 290-295, ISBN 978-1-7281-3391-1
Publisher: IEEE
DOI: 10.1109/isvlsi.2019.00060

Performing Memristor-Aided Logic (MAGIC) using STT-MRAM

Author(s): Jeffry Louis, Barak Hoffer, Shahar Kvatinsky
Published in: 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019, Page(s) 787-790, ISBN 978-1-7281-0996-1
Publisher: IEEE
DOI: 10.1109/icecs46596.2019.8965179

X-MAGIC: Enhancing PIM using Input-Overwriting Capabilities

Author(s): Natan Peled, Rotem Ben-Hur, Ronny Ronen, Shahar vatinsky
Published in: 2020
Publisher: IFIP/IEEE
DOI: 10.5281/zenodo.4023242

abstractPIM: Bridging the Gap Between PIM Technology and ISA

Author(s): Adi Eliahu, Rotem Ben-Hur, Ronny Ronen, Shahar Kvatnsky
Published in: 2020
Publisher: IFIP/IEEE
DOI: 10.5281/zenodo.4023246

Enabling Relational Database Analytical Processing in Bulk-Bitwise Processing-In-Memory

Author(s): Ben Perach, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE International System-on-Chip Conference (SOCC), 2023, ISBN 979-8-3503-0011-6
Publisher: IEEE
DOI: 10.1109/socc58585.2023.10256706

HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory

Author(s): Batel Oved; Orian Leitersdorf; Ronny Ronen; Shahar Kvatinsky
Published in: International Conference on Modern Circuits and Systems Technologies (MOCAST), 2022, ISBN 978-1-6654-6717-9
Publisher: IEEE
DOI: 10.1109/mocast54814.2022.9837685

Book chapters (1)

abstractPIM: A Technology Backward-Compatible Compilation Flow for Processing-In-Memory

Author(s): Adi Eliahu, Rotem Ben-Hur, Ronny Ronen, Shahar Kvatinsky
Published in: IFIP Advances in Information and Communication Technology, 2021, Page(s) 343-361, ISBN 978-3-030-81641-4
Publisher: Springer, Cham
DOI: 10.1007/978-3-030-81641-4_16

Peer reviewed articles (21)

SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput

Author(s): Rotem Ben-Hur; Ronny Ronen; Ameer Haj-Ali; Debjyoti Bhattacharjee; Adi Eliahu; Natan Peled; Shahar Kvatinsky
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Issue 1, 2019, ISSN 0278-0070
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.36227/techrxiv.12894899

AritPIM: High-Throughput In-Memory Arithmetic

Author(s): Orian Leitersdorf; Dean Leitersdorf; Jonathan Gal; Mor Dahan; Ronny Ronen; Shahar Kvatinsky
Published in: IEEE Transactions on Emerging Topics in Computing (TETC), 2023, ISSN 2168-6750
Publisher: IEEE Computer Society
DOI: 10.1109/tetc.2023.3268137

Efficient Training of the Memristive Deep Belief Net Immune to Non-Idealities of the Synaptic Devices

Author(s): Wei Wang, Barak Hoffer, Tzofnat Greenberg-Toledo, Yang Li, Minhui Zou, Eric Herbelin, Ronny Ronen, Xiaoxin Xu, Yulin Zhao, Jianguo Yang, Shahar Kvatinsky
Published in: Advanced Intelligent Systems, 2022, ISSN 2640-4567
Publisher: Wiley-VCH GmbH
DOI: 10.1002/aisy.202100249

C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory

Author(s): Mor M. Dahan, Evelyn T. Breyer, Stefan Slesazeck, Thomas Mikolajick, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers, Issue Vol. 69, No. 4, 2022, Page(s) pp. 1595-1605, ISSN 1549-8328
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsi.2021.3139736

Experimental Demonstration of Non-Stateful In-Memory Logic with 1T1R OxRAM Valence Change Mechanism Memristors

Author(s): Henriette Padberg, Amir Regev, Giuseppe Piccolboni, Alessandro Bricalli, Gabriel Molas, Jean Francois Nodin, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, ISSN 1558-3791
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsii.2023.3302235

A memristive deep belief neural network based on silicon synapses

Author(s): Wei Wang, Loai Danial, Yang Li, Eric Herbelin, Evgeny Pikhay, Yakov Roizin, Barak Hoffer, Zhongrui Wang, Shahar Kvatinsky
Published in: Nature Electronics, 2022, ISSN 2520-1131
Publisher: Nature Electronics (Nat Electron)
DOI: 10.1038/s41928-022-00878-9

Physical based compact model of Y-Flash memristor for neuromorphic computation

Author(s): Wei Wang, Loai Danial, Eric Herbelin, Barak Hoffer, Batel Oved, Tzofnat Greenberg-Toledo, Evgeny Pikhay, Yakov Roizin, and Shahar Kvatinsky.
Published in: Applied Physics Letters, Issue Vol. 119, No. 26, 2021, ISSN 1077-3118
Publisher: Applied Physics Letters
DOI: 10.1063/5.0069116

FourierPIM: High-throughput in-memory Fast Fourier Transform and polynomial multiplication

Author(s): Orian Leitersdorf, Yahav Boneh, Gonen Gazit, Ronny Ronen, Shahar Kvatinsky
Published in: Memories - Materials, Devices, Circuits and Systems, 2023, ISSN 2773-0646
Publisher: Elsevier
DOI: 10.1016/j.memori.2023.100034

Training of Quantized Deep Neural Networks using a Magnetic Tunnel Junction-Based Synapse

Author(s): Tzofnat Greenberg-Toledo, Ben Perach, Itay Hubara, Daniel Soudry and Shahar Kvatinsky
Published in: Semiconductor Science and Technology, 2021, Page(s) Vol. 36, No. 11, ISSN 0268-1242
Publisher: Institute of Physics Publishing
DOI: 10.1088/1361-6641/ac251b

Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics

Author(s): Ben Perach, Ronny Ronen, Benny Kimelfeld, Shahar Kvatinsky
Published in: IEEE Transactions on Emerging Topics in Computing, 2023, ISSN 2168-6750
Publisher: IEEE Computer Society
DOI: 10.1109/tetc.2023.3315189

IMAGING-In-Memory AlGorithms for Image processiNG

Author(s): Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers, 2018, Page(s) 1-14, ISSN 1549-8328
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/TCSI.2018.2846699

Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing

Author(s): Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Micro, Issue 38/5, 2018, Page(s) 13-21, ISSN 0272-1732
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/mm.2018.053631137

An Asynchronous and Low-Power True Random Number Generator Using STT-MTJ

Author(s): Ben Perach, shahar kvatinsky
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Issue 27/11, 2019, Page(s) 2473-2484, ISSN 1063-8210
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tvlsi.2019.2927816

Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic

Author(s): Nimrod Wald, Shahar Kvatinsky
Published in: Microelectronics Journal, Issue 86, 2019, Page(s) 22-33, ISSN 0026-2692
Publisher: Mackintosh Publications
DOI: 10.1016/j.mejo.2019.02.013

Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse

Author(s): Tzofnat Greenberg-Toledo, Roee Mazor, Ameer Haj-Ali, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers, Issue 66/4, 2019, Page(s) 1571-1583, ISSN 1549-8328
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsi.2018.2888538

CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM

Author(s): Nishil Talati, Heonjae Ha, Ben Perach, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Micro, Issue 39/1, 2019, Page(s) 33-43, ISSN 0272-1732
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/mm.2018.2890033

Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)

Author(s): Barak Hoffer, Vikas Rana, Stephan Menzel, Rainer Waser, Shahar Kvatinsky
Published in: IEEE Transactions on Electron Devices, Issue 67/8, 2020, Page(s) 3115-3122, ISSN 0018-9383
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2020.3001247

MultPIM: Fast Stateful Multiplication for Processing-in-Memory

Author(s): Orian Leitersdorf, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs, Issue Vol. 69, No. 3, pp. 1647-1651, 2022, Page(s) 1647-1651, ISSN 1549-7747
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsii.2021.3118215

The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems

Author(s): Ronny Ronen, Adi Eliahu, Orian Leitersdorf, Natan Peled, Kunal Korgaonkar, Anupam Chattopadhyay, Ben Perach, Shahar Kvatinsky
Published in: ACM Journal on Emerging Technologies in Computing Systems, Issue Vol. 18, No. 2, Article No. 43, pp. 1-29, 2022, ISSN 1550-4832
Publisher: Association for Computing Machinary, Inc.
DOI: 10.1145/3465371

ClaPIM: Scalable Sequence Classification Using Processing-in-Memory

Author(s): Marcel Khalifa, Barak Hoffer, Orian Leitersdorf, Robert Hanhan, Ben Perach, Leonid Yavits, Shahar Kvatinsky
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, ISSN 1063-8210
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tvlsi.2023.3293038

Stateful Logic Using Phase Change Memory

Author(s): Barak Hoffer, Nicolás Wainstein, Christopher M. Neumann, Eric Pop, Eilam Yalon, Shahar Kvatinsky
Published in: IEEE Journal of Exploratory Solid-State Computational Devices and Circuits Transactions on Electronic Devices, 2022, Page(s) Vol. 8, No. 2, pp. 77-83, ISSN 2329-9231
Publisher: IEEE
DOI: 10.1109/jxcdc.2022.3219731

Other (1)

The Bitlet Model: Defining a Litmus Test for the Bitwise Processing-in-Memory Paradigm

Author(s): Korgaonkar, Kunal; Ronen, Ronny; Chattopadhyay, Anupam; Kvatinsky, Shahar
Published in: Issue 1, 2019
Publisher: ArXiv
DOI: 10.48550/arxiv.1910.10234