Skip to main content

Memristive In-Memory Processing System

Searching for OpenAIRE data...

Publications

Making Memristive Processing-in-Memory Reliable

Author(s): Orian Leitersdorf; Ronny Ronen; Shahar Kvatinsky
Published in: 28th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2021, ISBN 978-1-7281-8281-0
Publisher: IEEE
DOI: 10.1109/icecs53924.2021.9665596

Making Real Memristive Processing-in-Memory Faster and Reliable

Author(s): Shahar Kvatinsky
Published in: International Cellular Nanoscale Networks and their Applications, 2021, Page(s) pp. 1-3, ISBN 978-1-6654-3948-0
Publisher: IEEE
DOI: 10.1109/cnna49188.2021.9610786

Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory

Author(s): Orian Leitersdorf; Ben Perach; Ronny Ronen; Shahar Kvatinsky
Published in: 58th ACM/IEEE Design Automation Conference (DAC), 2021, ISBN 978-1-6654-3274-0
Publisher: IEEE
DOI: 10.1109/dac18074.2021.9586324

Enhancing Security of Memristor Computing System Through Secure Weight Mapping

Author(s): Minhui Zou, Junlong Zhou, Xiaotong Cui, Wei Wang, Shahar Kvatinsky
Published in: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022
Publisher: IEEE

Performing Stateful Logic Using Spin-Orbit Torque (SOT) MRAM

Author(s): Barak Hoffer, Shahar Kvatinsky
Published in: IEEE International Conference on Nanotechnology (NANO), 2022
Publisher: IEEE

FiltPIM: In-Memory Filter for DNA Sequencing

Author(s): Marcel Khalifa, Rotem Ben-Hur, Ronny Ronen, Orian Leitersdorf, Leonid Yavits and Shahar Kvatinsky
Published in: IEEE International Conference on Electronics Circuits and Systems (ICECS), 2021, Page(s) pp. 1-6, ISBN 978-1-7281-8281-0
Publisher: IEEE
DOI: 10.1109/icecs53924.2021.9665570

MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic

Author(s): Orian Leitersdorf, Ronny Ronen, Shahar Kvatinsky
Published in: International Symposium on Circuits and Systems, 2022
Publisher: IEEE

Efficient Algorithms for In-Memory Fixed Point Multiplication Using MAGIC

Author(s): Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Shahar Kvatinsky
Published in: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Page(s) 1-5, ISBN 978-1-5386-4881-0
Publisher: IEEE
DOI: 10.1109/iscas.2018.8351561

Real Processing-in-Memory with Memristive Memory Processing Unit (mMPU)

Author(s): Shahar Kvatinsky
Published in: 2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019, Page(s) 142-148, ISBN 978-1-7281-1601-3
Publisher: IEEE
DOI: 10.1109/asap.2019.00-10

A Dual-Band CMOS Low-Noise Amplifier using Memristor-Based Tunable Inductors

Author(s): Nicolas Wainstein, Tamir Tsabari, Yarden Goldin, Eilam Yalon, Shahar Kvatinsky
Published in: 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019, Page(s) 290-295, ISBN 978-1-7281-3391-1
Publisher: IEEE
DOI: 10.1109/isvlsi.2019.00060

Performing Memristor-Aided Logic (MAGIC) using STT-MRAM

Author(s): Jeffry Louis, Barak Hoffer, Shahar Kvatinsky
Published in: 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019, Page(s) 787-790, ISBN 978-1-7281-0996-1
Publisher: IEEE
DOI: 10.1109/icecs46596.2019.8965179

A Pipelined Memristive Neural Network Analog-to-Digital Converter

Author(s): Loai Danial, Kanishka Sharma, Shahar Kvatinsky
Published in: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2020
Publisher: IEEE

X-MAGIC: Enhancing PIM using Input-Overwriting Capabilities

Author(s): Natan Peled, Rotem Ben-Hur, Ronny Ronen, Shahar vatinsky
Published in: 2020
Publisher: IFIP/IEEE
DOI: 10.5281/zenodo.4023242

abstractPIM: Bridging the Gap Between PIM Technology and ISA

Author(s): Adi Eliahu, Rotem Ben-Hur, Ronny Ronen, Shahar Kvatnsky
Published in: 2020
Publisher: IFIP/IEEE
DOI: 10.5281/zenodo.4023246

HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory

Author(s): Batel Oved; Orian Leitersdorf; Ronny Ronen; Shahar Kvatinsky
Published in: International Conference on Modern Circuits and Systems Technologies (MOCAST), 2022 11th, 2022, ISBN 978-1-6654-6717-9
Publisher: IEEE
DOI: 10.1109/mocast54814.2022.9837685

Efficient Training of the Memristive Deep Belief Net Immune to Non-Idealities of the Synaptic Devices

Author(s): Wei Wang, Barak Hoffer, Tzofnat Greenberg-Toledo, Yang Li, Minhui Zou, Eric Herbelin, Ronny Ronen, Xiaoxin Xu, Yulin Zhao, Jianguo Yang, Shahar Kvatinsky
Published in: Advanced Intelligent Systems, 2022, ISSN 2640-4567
Publisher: Wiley-VCH GmbH
DOI: 10.1002/aisy.202100249

C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory

Author(s): Mor M. Dahan, Evelyn T. Breyer, Stefan Slesazeck, Thomas Mikolajick, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 69, No. 4, 2022, Page(s) pp. 1595-1605, ISSN 1549-8328
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsi.2021.3139736

Physical based compact model of Y-Flash memristor for neuromorphic computation

Author(s): Wei Wang, Loai Danial, Eric Herbelin, Barak Hoffer, Batel Oved, Tzofnat Greenberg-Toledo, Evgeny Pikhay, Yakov Roizin, and Shahar Kvatinsky.
Published in: Applied Physics Letters, Vol. 119, No. 26, 2021, ISSN 1077-3118
Publisher: Applied Physics Letters
DOI: 10.1063/5.0069116

Training of Quantized Deep Neural Networks using a Magnetic Tunnel Junction-Based Synapse

Author(s): Tzofnat Greenberg-Toledo, Ben Perach, Itay Hubara, Daniel Soudry and Shahar Kvatinsky
Published in: Semiconductor Science and Technology, 2021, Page(s) Vol. 36, No. 11, ISSN 0268-1242
Publisher: Institute of Physics Publishing
DOI: 10.1088/1361-6641/ac251b

IMAGING-In-Memory AlGorithms for Image processiNG

Author(s): Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers, 2018, Page(s) 1-14, ISSN 1549-8328
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/TCSI.2018.2846699

Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing

Author(s): Ameer Haj-Ali, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Micro, 38/5, 2018, Page(s) 13-21, ISSN 0272-1732
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/mm.2018.053631137

An Asynchronous and Low-Power True Random Number Generator Using STT-MTJ

Author(s): Ben Perach, shahar kvatinsky
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27/11, 2019, Page(s) 2473-2484, ISSN 1063-8210
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tvlsi.2019.2927816

Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic

Author(s): Nimrod Wald, Shahar Kvatinsky
Published in: Microelectronics Journal, 86, 2019, Page(s) 22-33, ISSN 0026-2692
Publisher: Mackintosh Publications
DOI: 10.1016/j.mejo.2019.02.013

Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse

Author(s): Tzofnat Greenberg-Toledo, Roee Mazor, Ameer Haj-Ali, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers, 66/4, 2019, Page(s) 1571-1583, ISSN 1549-8328
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsi.2018.2888538

CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM

Author(s): Nishil Talati, Heonjae Ha, Ben Perach, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Micro, 39/1, 2019, Page(s) 33-43, ISSN 0272-1732
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/mm.2018.2890033

Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)

Author(s): Barak Hoffer, Vikas Rana, Stephan Menzel, Rainer Waser, Shahar Kvatinsky
Published in: IEEE Transactions on Electron Devices, 67/8, 2020, Page(s) 3115-3122, ISSN 0018-9383
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2020.3001247

MultPIM: Fast Stateful Multiplication for Processing-in-Memory

Author(s): Orian Leitersdorf, Ronny Ronen, Shahar Kvatinsky
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, No. 3, pp. 1647-1651, 2022, Page(s) 1647-1651, ISSN 1549-7747
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcsii.2021.3118215

The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems

Author(s): Ronny Ronen, Adi Eliahu, Orian Leitersdorf, Natan Peled, Kunal Korgaonkar, Anupam Chattopadhyay, Ben Perach, Shahar Kvatinsky
Published in: ACM Journal on Emerging Technologies in Computing Systems, Vol. 18, No. 2, Article No. 43, pp. 1-29, 2022, ISSN 1550-4832
Publisher: Association for Computing Machinary, Inc.
DOI: 10.1145/3465371

The Bitlet Model: Defining a Litmus Test for the Bitwise Processing-in-Memory Paradigm

Author(s): Korgaonkar, Kunal; Ronen, Ronny; Chattopadhyay, Anupam; Kvatinsky, Shahar
Published in: 2019
Publisher: Chattopadhyay, Anupam; Kvatinsky, Shahar

MTJ-Based Hardware Synapse Design for Quantized Deep Neural Networks

Author(s): Toledo, Tzofnat Greenberg; Perach, Ben; Soudry, Daniel; Kvatinsky, Shahar
Published in: 2019
Publisher: Soudry, Daniel; Kvatinsky, Shahar