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Defect Simulation and Material Growth of III-V Nanostructures- European Industrial Doctorate Program

Periodic Reporting for period 2 - DESIGN-EID (Defect Simulation and Material Growth of III-V Nanostructures- European Industrial Doctorate Program)

Período documentado: 2022-01-01 hasta 2023-12-31

-What is the problem/issue being addressed?
DESIGN-EID was an innovate programme providing a unique research training opportunity for a cohort of 3 Early Stage Researchers (ESRs) in the novel and multidisciplinary field of semiconductor opto-electronic technology. The DESIGN-EID project offered strategic training opportunities with exceptional career development prospects in academia and industry.
There is great interest in integrating monolithically or heterogeneously compound semiconductors on silicon to exploit their complementary properties. Particularly to exploit the direct bandgap of III-Vs for optoelectronic devices densely integrated with CMOS. However, lattice and thermal mismatch between materials makes epitaxial growth on silicon challenging.
In this project, we have addressed the challenges associated with the formation of defects and material growth in compound semiconductors such as III-Vs, as well as their impact on device performance. Defects may have been exploited in the development of novel devices, but more often, we wished to mitigate their deteriorating impact on electro-optic device performance by growth and materials optimization. The project combined experimental work at IBM Research Zurich (IBM) with modelling and simulation efforts at Device Modelling Group (University of Glasgow) and Synopsys QuantumATK (ATK, Denmark).


-Why is it important for society?
We identified an increasing demand for reliable and performant electronics circuits, such as those used in our cell phones, computers, or our cars to cite a few. This demand will continue to grow in the coming decades, which challenges the semiconductor industry to develop novel materials and fabrication processes, and reduce not only the overall product cost but also the time to market for new devices and technologies.
Based on our work, the fabrication process of a specific class of semiconductor materials (called “ III-Vs” ) was improved significantly, and the material properties were tailored to enhance the electronic devices' performances. Because such materials and electronic devices are used in every electronic chip currently produced, these new chips need to consume less power and be faster and more reliable. This will lead to faster internet connections, reducing the power consumption in the data centres and building a new type of computer architecture such as quantum computers.



-What are the overall objectives?
We established an industrially driven training network in advanced semiconductor materials development and simulation.

Developed a simulation framework to capture the complexities of growth and defect formation in compound semiconductors.

Experimented validation of modelling concepts via fabrication and characterization of electronic and photonic III-V devices.
- ESR1 made excellent progress in mastering all techniques required to have a consistent material growth of various III-V materials, including homogenous and heterogeneous material systems. As a result, we developed a methodology for a reliable and reproducible growth process. This methodology was used from ESR2 to fabricate various devices and characterize them.
- From the device point of view, following the plan outlined in the project, ESR2 has executed numerous device simulations, which allowed us to optimise the device design and fabrication process. The results of these numerical simulations were used to guide the device fabrication developed at IBM by ESR2 and ESR1. Our simulations significantly reduced the design space, which translates into a faster and cheaper fabrication process.
- The main outcome of the simulation work done by ESR3 was a new algorithm permitting the execution of atomistic simulation in InP systems containing numerous defects. The main result of these atomistic simulations was new simulation methodology, which now is implemented in Synopsys QuantumATK commercial software.
The ESRs fulfilled all requirements for training both in research-related aspects of the advanced technology involved in research projects and also in generic aspects for career development.

Our goal was to significantly improve the current technology and make a new type of optoelectronic device such as sensors, transistors and lasers. Some of the results are:
- Fundamental understanding of the role of defects in the materials and, hence in the device performance made from these materials
- New device design which will significantly improve the device capabilities and characteristics
- To train and educate the next generations of your researchers in electronics, solid-state physics, nanotechnology and machine learning in physical sciences.
- A significant amount of open-access papers and a patent can be shared with researchers from academia and industry worldwide.
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The potential impact was faster, cheaper and better opto-electronics devices. Such devices are used in everyday computers and phones, in the data centres, in the internet communication and satellites and everywhere in the electronics industry. Hence, more efficient, and better devices reduced the power consumption which will lead to less green gasses revealed in the atmosphere and help us to slow down the global warming.
Project Meeting Copenhagen