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Defect Simulation and Material Growth of III-V Nanostructures- European Industrial Doctorate Program

Periodic Reporting for period 1 - DESIGN-EID (Defect Simulation and Material Growth of III-V Nanostructures- European Industrial Doctorate Program)

Reporting period: 2020-01-01 to 2021-12-31

-What is the problem/issue being addressed?
DESIGN-EID is an innovate programme providing a unique research training opportunity for a cohort of 3 Early Stage Researchers (ESRs) in the novel and multidisciplinary field of semiconductor opto-electronic technology. The DESIGN-EID project offers strategic training opportunities with exceptional prospects for career development in both academia and industry.
There is a great interest in integrating compound semiconductors either monolithically or heterogeneously on silicon to exploit their complementary properties. Particularly to exploit the direct bandgap of III-Vs for opto-electronic devices densely integrated with CMOS. However, lattice and thermal mismatch between materials makes epitaxial growth on silicon challenging.
In this project we will address the challenges associated with the formation of defects and material growth in compound semiconductors such as III-Vs as well as their impact on device performance. Defects may be exploited in the development of novel devices, but more often we wish to mitigate their deteriorating impact on electro-optic device performance, by growth and materials optimization. The project combines experimental work at IBM Research Zurich (IBM) with modelling and simulation efforts at Device Modelling Group (University of Glasgow) and Synopsys QuantumATK (ATK, Denmark).

-Why is it important for society?
Nowadays, there is an increasing demand for reliable and performant electronics circuits, such as those used in our cell phones, computers, or our cars just to cite a few. This demand will continue to grow in the coming decades, which challenges the semiconductor industry to develop novel materials and fabrication processes, and reduce not only the overall product cost but also the time to market for new devices and technologies.
Based on our work the fabrication process of a specific class semiconductor materials (called “ III-Vs” ) will be improved significantly, and the material properties will be tailored to enhance the electronic devices performances. Because such materials and electronic devices are used in every electronic chip currently produced on the planet, these new chips need to consume less power, be faster and more reliable. This will lead to faster internet connections, reducing the power consumption in the data centres and building a new type of computer architecture such as quantum computers.

-What are the overall objectives?
Establishment of an industrially driven training network in advanced semiconductor materials development and simulation.

Development of a simulation framework to capture the complexities of growth and defect formation in compound semiconductors.

Experimental validation of modelling concepts via fabrication and characterization of electronic and photonic III-V devices.
- ESR1 made an excellent progress in mastering all techniques which are required to have a consistent material growth of various III-V materials, including homogenous and heterogenous material systems. As a result, we have currently a methodology for a reliable and reproducible growth process. This methodology now will be used from ESR2 to fabricate various devices and characterize them.
- From the device point of view, following the plan outlined in the project, ESR2 has executed numerous device simulations which allowed us to optimized the device design and fabrication process. The results of these numerical simulations will be used to guide the device fabrication which is currently being developed at IBM by ESR2 and ESR1. Our simulations significantly reduced the design space which translates into a faster and cheaper fabrication process.
- The main outcome of the simulation work done by ESR3 is a new algorithm permitting to execute accurately atomistic simulation in InP systems containing numerous defects. The main result of these atomistic simulations is a new simulation methodology which will be implemented in Synopsys QuantumATK commercial software.
The ESRs have all been fulfilling all requirements for training both in research related aspects in the advanced technology involved in the research projects and also in generic aspects for career development.

Our ultimate goal is to significantly improve the current technology and to make a new type of opto-electronic devices such as sensors, transistors and laser. Some of the expected results are:
- Fundamental understanding of the role of defects in the materials and hence in the device performance made from these materials
- New device design which will improve significantly the device capabilities and characteristics
- To train and educate the next generations of your researchers in electronics, solid state physics, nanotechnology and the use of machine learning in physical sciences.
- Significant amount of open access papers and a patent which can be shared with researchers from academia and industry from all over the world.
The potential impact is faster, cheaper and better opto-electronics devices. Such devices are used in everyday computers and phones, in the data centres, in the internet communication and satellites and everywhere in the electronics industry. Hence, more efficient and better devices will reduce the power consumption which will lead to less green gasses revealed in the atmosphere and help us to slow down the global warming.
Project Meeting Copenhagen