SECURE PLATFORM FOR ICT SYSTEMS ROOTED AT THE SILICON MANUFACTURING PROCESS

Informations projet

SPIRS

N° de convention de subvention: 952622

DOI

10.3030/952622

Projet clôturé

Date de signature de la CE 14 Juillet 2021

Date de début 1 Octobre 2021

Date de fin 30 Septembre 2024

Financé au titre de

• INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)

Coût total

€ 5 041 091,25

Contribution de l’UE

€ 5 041 091,25

Coordonné par

AGENCIA ESTATAL CONSEJO SUPERIOR DE INVESTIGACIONES CIENTIFICAS
Spain

CORDIS fournit des liens vers les livrables publics et les publications des projets HORIZON.

Les liens vers les livrables et les publications des projets du 7e PC, ainsi que les liens vers certains types de résultats spécifiques tels que les jeux de données et les logiciels, sont récupérés dynamiquement sur OpenAIRE .

Livrables

Demonstrators, pilots, prototypes (8)

Final design of RoT

An analysis of the security level (leakage/security assessment tests and/or attacks) and the impact of potential attackers on the performance of RoT components will be analyzed. The countermeasures will be included in this demonstrator to achieve an enhanced version of RoT.

Initial design of RoT components

The initial design of RoT components including PUF, entropy source, and cryptographic algorithms will be detailed. A first demonstrator that integrates all the RoT components will be available.

Prototype v1

The communication from both the WP5 RISCV processor and the WP2 HW RoT to the HLOS through the TEE is a significant step in SPIRS This deliverable demonstrates that communication a subset of the D31 specifications

Prototype v2

Building on D3.2, this deliverable demonstrates the full capabilities of the D3.1 specifications, including secure measured boot and TA functionality.

TNED proof-of-concept

The TNED software architecture, its integration with OAM procedures, and the incorporation of an initial set of security functions will be demonstrated, using the initial implementations of the TEE and RoT. This deliverable will include an impact assessment for the different use cases, performed using the GDPR as the main guideline. This version of the TNED will be used for the initial use case demonstrations.

Final TNED Implementation

Based on the feedback collected from use case demonstrators and the further refinement on the SPIRS components, a mature release of the TNED will be made available, ready for executing the final use case demonstrators, and suitable for further exploitation as one of the project outcomes.

Preliminary FPGA implementation of the SPIRS platform

A preliminary FPGA implementation of the SPIRS platform including the selected RISC-V processor core and the assembling of RoT components. The first results of FPGA implementations will be reported in terms of area computations, timing, and power consumption.

Final FPGA implementation of SPIRS platform

A demonstrator of the SPIRS platform with the final components on an FPGA-based platform.

Documents, reports (4)

Report on the governance scheme and validation of SPIRS platform in the Industry 4.0 and 5G Network use cases

The report will describe in detail the SPIRS platform, its integration within the Industry 4.0 and 5G Network scenarios and the results of the validation activities. A specific section of the deliverable will focus on the validation of the privacy respectful protocols enabling the SPIRS governance scheme.

Final VLSI integration of a lightweight RoT

This report will describe the performance of the first VLSI integration after testing measurements at lab. The design of a second VLSI integration will be reported to obtain a final VLSI integration for SPIRS.

Report on the use cases and validation plan

The report will describe in detail the two use cases their possible vulnerabilities the security requirements and consolidates the specification of the custom SPIRS systems This first section of the report will be instrumental to provide useful feedback to WP3 and WP4 The second section of the report will describe in detail the validation plan

First VLSI integration of a lightweight RoT

The selection of the technology for VLSI integration will be described The selected hardware building blocks of RoT and simulation and available experimental results will be detailed

Other (2)

Industrial Advisory Board meeting on the results of the project

Industrial Advisory Board meeting on the results of the project.

SPIRS final workshop

An international workshop will be organized to gather members of the scientific community and researchers from private companies.

Websites, patent fillings, videos etc. (1)

Website activation

SPIRS website will be the main promotional tool for communicating projects activities and results The website will also include a Restricted Area for the partners for easycommunicationdiscussion and exchange of information between the consortium members It will be

Publications

Conference proceedings (27)

Protegiendo la identidad de las denuncias en un sistema abierto y auditable

Auteurs: S. Chica, A. Marín, D. Arroyo, J. Díaz
Publié dans: Proceedings Actas de la XVII Reunión Española sobre Criptología y Seguridad de la Información (RECSI 2022), Numéro 19-21 October, 2022, 2022, Page(s) 68, ISBN 978-84-19024-14-5
Éditeur: Editorial de la Universidad de Cantabria

SoK: A Systematic Review of TEE Usage for Developing Trusted Applications

Auteurs: Arttu Paju; Muhammad Owais Javed; Juha Nurmi; Juha Savimäki; Brian McGillion; Billy Bob Brumley
Publié dans: The 18th International Conference on Availability, Reliability and Security (ARES 2023), Numéro 34, 2023, Page(s) 1-15, ISBN 9798400707728
Éditeur: Association for Computing Machinary, Inc.
DOI: 10.1145/3600160.3600169

About the Fujisaki-Okamoto Transformation in the Code-Based Algorithms of the NIST Post-quantum Call

Auteurs: Miguel Ángel González de la Torre, Luis Hernández Encinas 
Publié dans: Proc. Conference 15th International Conference on Computational Intelligence in Security for Information Systems (CISIS 2022), Numéro Lecture Notes in Networks and Systems book series (LNNS,volume 532, 2022, Page(s) 75-85, ISBN 978-3-031-18409-3
Éditeur: Springer
DOI: 10.1007/978-3-031-18409-3_8

Secure Platform for ICT Systems Rooted at the Silicon Manufacturing Process (SPIRS)

Auteurs: P. Brox, M. C. Martínez-Rodríguez, D. Arroyo
Publié dans: Proceedings JNIC 2022 (VII Jornadas Nacionales de Investigación en Ciberseguridad 2022), Numéro 27-29 June, 2022, 2022, Page(s) 363-366, ISBN 978-84-88734-13-6
Éditeur: Fundación Tecnalia Research and Innovation

True Random Number Generator based on RO-PUF

Auteurs: Luis F. Rojas Muñoz, Santiago Sánchez Solano, Macarena C. Martínez-Rodríguez, Piedad Brox
Publié dans: 37th Conference on Design of Circuits and Integrated Circuits (DCIS) 2022, Numéro 16-18 November 2022, 2022, ISBN 978-1-6654-5950-1
Éditeur: IEEE
DOI: 10.1109/dcis55711.2022.9970032

A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem

Auteurs: E. Camacho-Ruiz, S. Sánchez-Solano, M. C. Martínez-Rodríguez, E. Tena-Sánchez, P. Brox
Publié dans: 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS), 2023, ISSN 2640-5563
Éditeur: IEEE
DOI: 10.1109/dcis58620.2023.10336001

Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs

Auteurs: Macarena C. Martínez-Rodríguez; Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox
Publié dans: 2021 XXXVI Conference on Design of Circuits and Integrated Systems (DCIS), Numéro 24-26 Nov. 2021, 2021, ISBN 978-1-6654-2116-4
Éditeur: IEEE
DOI: 10.1109/dcis53048.2021.9666190

A complete SHA-3 hardware library based on a high efficiency Keccak design

Auteurs: E. Camacho, S. Sánchez-Solano, M. C. Martínez, P. Brox
Publié dans: 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), 2023, Page(s) 1-7, ISBN 979-8-3503-3757-0
Éditeur: IEEE
DOI: 10.1109/norcas58970.2023.10305448

Análisis comparativo de las firmas digitales postcuánticas basadas en retículos

Auteurs: E. Iglesias-Hernández, L. Hernández-Álvarez, L. Hernández-Encinas, J. I. Sanchez-García
Publié dans: Reina Quintero, A.M., Ceballos Guerrero, R. y Varela Vaca, Á.J. (Eds.) (2024). IX Jornadas Nacionales de Investigación en Ciberseguridad. Sevilla, 2024, ISBN 978-84-09-62140-8
Éditeur: Universidad de Sevilla

Analyzing the Effectiveness of Native Token Airdrop Campaigns in NFT Marketplaces

Auteurs: Paul Kuhle, David Arroyo, Pablo de Andrés
Publié dans: Lecture Notes in Networks and Systems, Numéro LNNS,volume 778, 2023, ISBN 978-3-031-45154-6
Éditeur: Springer, Cham
DOI: 10.1007/978-3-031-45155-3_37

Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems

Auteurs: Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox
Publié dans: IEEE Nordic Circuits and Systems Conference (NorCAS) 2024, 2024
Éditeur: IEEE
DOI: 10.1109/norcas64408.2024.10752484

Diseño y evaluación de las prestaciones de funciones físicas no clonables basadas en osciladores en anillo sobre FPGAs

Auteurs: M. C. Martínez-Rodríguez, E. Camacho-Ruiz, P. Brox, S. Sánchez-Solano
Publié dans: Proceedings JNIC 2022 (VII Jornadas Nacionales de Investigación en Ciberseguridad 2022), Numéro 27-29 June, 2022, 2022, Page(s) 298-299, ISBN 978-84-88734-13-6
Éditeur: Fundación Tecnalia Research and Innovation

HW/SW implementation of RSA digital signature on a RISC-V-based System-on-Chip

Auteurs: A. Karmakar, S. Sánchez-Solano, M. C. Martínez-Rodríguez, P. Brox
Publié dans: 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS), 2023, ISBN 979-8-3503-0385-8
Éditeur: IEEE
DOI: 10.1109/dcis58620.2023.10335970

Exploiting the DICE specification to ensure strong identity and integrity of IoT devices

Auteurs: Enrico Bravi, Silvia Sisinni, Antonio Lioy
Publié dans: 2023 8th International Conference on Smart and Sustainable Technologies (SpliTech), 2023, Page(s) 1-6
Éditeur: IEEE
DOI: 10.23919/splitech58164.2023.10193517

A Security Comparison between AES-128 and AES-256 FPGA implementations against DPA attacks

Auteurs: V. Zúñiga, E. Tena, A. J. Acosta
Publié dans: 2023 38th Conference on Design of Circuits and Integrated Systems (DCIS), 2023, ISBN 979-8-3503-0385-8
Éditeur: IEEE
DOI: 10.1109/dcis58620.2023.10336003

Study and applications of the new NIST lightweight encryption with authentication standard in hardware implementations

Auteurs: C. Fernádez-García, C.J. Jiménez-Fernández
Publié dans: Reina Quintero, A.M., Ceballos Guerrero, R. y Varela Vaca, Á.J. (Eds.) (2024). IX Jornadas Nacionales de Investigación en Ciberseguridad. Sevilla, 2024, ISBN 978-84-09-62140-8
Éditeur: Universidad de Sevilla

Review of Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA

Auteurs: F. E. Potestad-Ordoñez, E. Tena-Sánchez, C. Fernández-García, V. Zúñiga-González, J. M. Mora Gutiérrez, C. Baena-Oliva, P. Parra-Fernández, A. J. Acosta-Jiménez, C. J. Jiménez-Fernández
Publié dans: Proceedings JNIC 2022 (VII Jornadas Nacionales de Investigación en Ciberseguridad 2022), Numéro 27-29 June, 2022, 2022, Page(s) 271-272, ISBN 978-84-88734-13-6
Éditeur: Fundación Tecnalia Research and Innovation

Hardware dedicado para la optimización temporal del algoritmo NTRU

Auteurs: E. Camacho-Ruiz, M. C. Martínez-Rodríguez, S. Sánchez-Solano, P. Brox
Publié dans: Proccedings JNIC 2022 (VII Jornadas Nacionales de Investigación en Ciberseguridad 2022), Numéro 27-29 June, 2022, 2022, Page(s) 296-297, ISBN 978-84-88734-13-6
Éditeur: Fundación Tecnalia Research and Innovation

About the FrodoKEM lattice-based algorithm

Auteurs: M. A. González de la Torre, L. Hernández Encinas, A. Queiruga Dios
Publié dans: Proceedings JNIC 2022 (VII Jornadas Nacionales de Investigación en Ciberseguridad 2022), Numéro 27-29 June, 2022, 2022, Page(s) 253-256, ISBN 978-84-88734-13-6
Éditeur: Fundación Tecnalia Research and Innovation

Review of Gate-Level Hardware Countermeasure Comparison Against Power Analysis Attacks

Auteurs: E. Tena-Sánchez, F. E. Potestad-Ordoñez, V. Zúñiga-González, C. Fernández-García, J. M. Mora Gutiérrez, C. J. Jiménez-Fernández, A. J. Acosta-Jiménez
Publié dans: Proceedings JNIC 2022 (VII Jornadas Nacionales de Investigación en Ciberseguridad 2022), Numéro 27-29 June, 2022, 2022, Page(s) 290-291, ISBN 978-84-88734-13-6
Éditeur: Fundación Tecnalia Research and Innovation

VLSI integration of a RO-based PUF into a 65 nm technology

Auteurs: Pau Ortega-Castro, Felipe Rojas-Muñoz, Jose M. Mora-Gutiérrez, Piedad Brox, Macarena C. Martínez-Rodríguez
Publié dans: IEEE Nordic Circuits and Systems Conference (NorCAS) 2024, 2024, ISBN 979-8-3315-1766-3
Éditeur: IEEE
DOI: 10.1109/norcas64408.2024.10752474

Malware Finances and Operations: a Data-Driven Study of the Value Chain for Infections and Compromised Access

Auteurs: Juha Nurmi; Mikko Niemelä; Billy Bob Brumley
Publié dans: ARES '23: Proceedings of the 18th International Conference on Availability, Reliability and Security, Numéro 108, 2023, Page(s) 1-12, ISBN 9798400707728
Éditeur: Association for Computing Machinery
DOI: 10.1145/3600160.3605047

Experimental cartography generation methodology for Electromagnetic Fault Injection Attacks [póster]

Auteurs: Rincón Beneyto, Juan Carlos; Casado Galán, Alejandro; Potestad Ordóñez, Francisco Eugenio; Acosta Jiménez, Antonio José; Tena Sánchez, Erica; Potestad Ordóñez, Francisco Eugenio (Coordinador)
Publié dans: instname:Universidad de Sevilla (US), Numéro 1, 2023
Éditeur: IEEE

Comparative analysis of lattice-based post-quantum cryptosystems

Auteurs: M. A. González de la Torre, J. I. Sánchez garcía, L. Hernández Encinas
Publié dans: Proceedings Actas de la XVII Reunión Española sobre Criptología y Seguridad de la Información (RECSI 2022), Numéro 19-21 October, 2022, 2022, Page(s) 121, ISBN 978-84-19024-14-5
Éditeur: Editorial de la Universidad de Cantabria
DOI: 10.22429/euc2022.028

Ataques por canal lateral contra AES mediante correlación de consumo de potencia

Auteurs: M. A. González de la Torre, V. Sarasa, L. Hernández-Álvarez, I. Morales, L. Hernández Encinas
Publié dans: Reina Quintero, A.M., Ceballos Guerrero, R. y Varela Vaca, Á.J. (Eds.) (2024). IX Jornadas Nacionales de Investigación en Ciberseguridad, 2024, ISBN 978-84-09-62140-8
Éditeur: Universidad de Sevilla

Enhancing the anonymity and auditability of whistleblowers protection

Auteurs: S. Chica, A. Marín, D. Arroyo, J. Díaz, F. Almenares, and D. Díaz
Publié dans: Workshop on Beyond the promises of web3.0: foundations and challenges of trust decentralization (WEB3-TRUST), Numéro 13-15 Juy, 2022, 2022
Éditeur: Springer
DOI: 10.20350/digitalcsic/14702

Review of: Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs

Auteurs: E. Potestad, A. Casado, E. Tena, A. J. Acosta-Jiménez
Publié dans: Reina Quintero, A.M., Ceballos Guerrero, R. y Varela Vaca, Á.J. (Eds.) (2024). IX Jornadas Nacionales de Investigación en Ciberseguridad, 2024, ISBN 978-84-09-62140-8
Éditeur: Universidad de Sevilla

Book chapters (1)

Cryptographic Security Through a Hardware Root of Trust

Auteurs: Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández-García, Erica Tena-Sánchez, Francisco E. Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio J. Acosta-Jiménez, Carlos J. Jiménez-Fernández, Piedad Brox
Publié dans: Lecture Notes in Computer Science, Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024, Page(s) 106-119
Éditeur: Springer Nature Switzerland
DOI: 10.1007/978-3-031-55673-9_8

Peer reviewed articles (16)

On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices

Auteurs: L.F. Rojas-Muñoz, S. Sánchez-Solano, M.C. Martínez-Rodríguez and P. Brox
Publié dans: Sensors, Numéro vol. 23, no. 8, article 4070, 2023, ISSN 1424-8220
Éditeur: Multidisciplinary Digital Publishing Institute (MDPI)
DOI: 10.3390/s23084070

Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher

Auteurs: F. E. Potestad-Ordóñez, E. Tena-Sánchez, A. J. Acosta-Jiménez, C. J. Jiménez-Fernández, R. Chaves
Publié dans: IEEE Access, Numéro Volume 10, 2022, Page(s) 65548 - 65561, ISSN 2169-3536
Éditeur: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/access.2022.3183764

Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems

Auteurs: Santiago Sánchez-Solano, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez and Piedad Brox
Publié dans: Sensors, Numéro 22 (5), 2057, 2022, ISSN 1424-8220
Éditeur: Multidisciplinary Digital Publishing Institute (MDPI)
DOI: 10.3390/s22052057

Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs

Auteurs: Ignacio M. Delgado-Lozano; Erica Tena-Sánchez; Juan Núñez; Antonio J. Acosta
Publié dans: IEEE Embedded Systems Letters, Numéro Volume 14, issue 2, 2022, Page(s) 99-102, ISSN 1943-0663
Éditeur: Institute of Electrical and Electronics Engineers
DOI: 10.1109/les.2021.3122395

Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems

Auteurs: E. Camacho-Ruiz, M.C. Martínez-Rodríguez, S. Sánchez-Solano and P. Brox
Publié dans: Cryptography, Numéro vol. 7, no.2, article 29, 2023, ISSN 2410-387X
Éditeur: Multidisciplinary Digital Publishing Institute
DOI: 10.3390/cryptography7020029

Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management

Auteurs: Santiago Sánchez-Solano, Luis F. Rojas-Muñoz, Macarena C. Martínez-Rodríguez, Piedad Brox
Publié dans: Sensors, Numéro 24, 2024, Page(s) 5674, ISSN 1424-8220
Éditeur: Multidisciplinary Digital Publishing Institute (MDPI)
DOI: 10.3390/s24175674

Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks

Auteurs: Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Carlos J. Jiménez-Fernández, Antonio J. Acosta, Ricardo Chaves
Publié dans: Applied Sciences, Numéro 12 (5), 2390, 2022, ISSN 2076-3417
Éditeur: MDPI
DOI: 10.3390/app12052390

Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations

Auteurs: Francisco Eugenio Potestad-Ordóñez; Erica Tena-Sanchez; J. M. Mora-Gutiérrez; Manuel Valencia-Barrero; C. J. Jimenez-Fernandez
Publié dans: Sensors (Basel, Switzerland), Numéro 21(22), 7596, 2021, ISSN 1424-8220
Éditeur: Multidisciplinary Digital Publishing Institute (MDPI)
DOI: 10.3390/s21227596

Analysis of the FO Transformation in the Lattice-Based Post-Quantum Algorithms

Auteurs: M.A. González de la Torre, L. Hernández Encinas, and A. Queiruga-Dios
Publié dans: Mathematics, Numéro 10 (16), 2967, 2022, ISSN 2227-7390
Éditeur: MDPI
DOI: 10.3390/math10162967

Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems

Auteurs: Macarena C. Martínez-Rodríguez, Luis F. Rojas-Muñoz, Eros Camacho-Ruiz, Santiago Sánchez-Solano and Piedad Brox
Publié dans: Cryptography, Numéro 6(4), 2022, Page(s) 51, ISSN 2410-387X
Éditeur: MPDI
DOI: 10.3390/cryptography6040051

Hardware Countermeasures Benchmarking against Fault Attacks

Auteurs: Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio José Acosta-Jiménez, Carlos Jesús Jiménez-Fernández and Ricardo Chaves
Publié dans: Applied Sciences, Numéro 12 (5), 2443, 2022, ISSN 2076-3417
Éditeur: MDPI
DOI: 10.3390/app12052443

TinyJAMBU Hardware Implementation for Low Power

Auteurs: Carlos Fernández-García, J. M. Mora-Gutiérrez, Carlos J. Jiménez-Fernández
Publié dans: IEEE Access, Numéro 12, 2024, Page(s) 108342-108349, ISSN 2169-3536
Éditeur: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/access.2024.3438378

True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices

Auteurs: L. Felipe Rojas-Muñoz, Santiago Sánchez-Solano, Macarena. C. Martínez-Rodríguez, Piedad Brox
Publié dans: Electronics, Numéro 11(23), 4028, 2022, Page(s) 1-24, ISSN 2079-9292
Éditeur: MPDI
DOI: 10.3390/electronics11234028

Investigating child sexual abuse material availability, searches, and users on the anonymous Tor network for a public health intervention strategy

Auteurs: Juha Nurmi, Arttu Paju, Billy Bob Brumley, Tegan Insoll, Anna K. Ovaska, Valeriia Soloveva, Nina Vaaranen-Valkonen, Mikko Aaltonen, David Arroyo
Publié dans: Scientific Reports, Numéro 14, 2024, ISSN 2045-2322
Éditeur: Nature Publishing Group
DOI: 10.1038/s41598-024-58346-7

Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs

Auteurs: Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Erica Tena-Sánchez
Publié dans: Sensors, Numéro 24, 2024, Page(s) 1598, ISSN 1424-8220
Éditeur: Multidisciplinary Digital Publishing Institute (MDPI)
DOI: 10.3390/s24051598

Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA

Auteurs: F. E. Potestad-Ordonez, E. Tena-Sanchez, J. M. Mora-Gutierrez, M. Valencia-Barrero, C. J. Jimenez-Fernandez
Publié dans: IEEE Access, Numéro 9, 2022, Page(s) 168444-168454, ISSN 2169-3536
Éditeur: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/access.2021.3136609