Description du projet
Une conception de circuit permettant une réponse adaptative aux chutes de tension rapides
Les chutes de tension sont des chutes imprévues de la tension d’alimentation des puces d’ordinateur, qui se produisent souvent à la suite de sursauts d’activité de circuits à haute intensité situés à proximité. Le projet FastVolt, financé par l’UE, porte sur les chutes de tension rapides, c’est-à-dire les chutes de tension en quelques cycles d’horloge. Les chercheurs prévoient de mettre au point un circuit simple et compact qui compense les chutes de tension sans retard de synchronisation. Il devrait en résulter une méthode pratique de réponse adaptative aux chutes de tension rapides, qui promet d’accroître l’efficacité des calculs. Des estimations prudentes suggèrent une augmentation des performances d’au moins 5 %. Les partenaires du projet prendront toutes les mesures nécessaires pour mener à bien la commercialisation de la nouvelle solution.
Objectif
"Voltage droops are unpredicted drops in the supply voltage of computer chips, which often occur as a result of nearby bursts of high intensity circuit activity. This proposal is concerned with fast voltage droops, where voltage drops within a few clock cycles. This means that any dynamic response must take place within one or at most two clock cycles. A promising direction for combining the advantages of a stable reference clock with a small response time are mixed-signal control loops, in which voltage measurements are digitized and control decisions are taken by digital logic. However, digitally measuring a dynamically changing voltage may cause metastability of the sampling circuit. Conventional approaches employ synchronizers to make the probability of metastable upsets negligible, which costs 2-3 clock cycles of additional delay.
Based on results of the ERC starting grant project ""A Theory of Reliable Hardware,'' we provide a simple, compact circuit that guarantees the desired behavior without incurring synchronizer delay. This yields a practical method for adaptive response to fast droops, which bears the promise of increasing computational efficiency. Conservative estimates suggest performance improvements of at least 5%, which would be of substantial economical interest.
The main obstacle to commercialization is a gap between theory and practice: Without an existing implementation, it takes a long time to develop a product and the associated risks are high. In this project, we will overcome this hurdle by developing, producing, and evaluating an Application-Specific Integrated Circuit (ASIC) demonstrator for our approach. We complement this primary goal by tasks aiming at maximizing impact: publication of results in high-profile scientific venues, patent protection to facilitate commercialization, and outreach to potential industry partners for developing products."
Champ scientifique
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectrical engineeringelectric energy
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectrical engineeringpower engineeringelectric power distribution
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringcomputer hardware
Programme(s)
Régime de financement
ERC-POC - Proof of Concept GrantInstitution d’accueil
66123 Saarbrucken
Allemagne