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Quantum electronics using scanning tunnelling microscopy based lithography

Objective

The objective of the QUEST project is to push the fabrication of silicon based devices below the 20 nm limit using SPM-based (scanning probe microscopy) lithography in order to:

- take advantage of the Coulomb blockade effect in an innovative architecture of single electron memory operating at room temperature
- to study transport in low dimensionality structures that exhibit physical effects such as ballistic transport, quantum interference and single electron phenomena,
- demonstrate the efficiency of a fabrication process that uses local probes (e.g. STM-Scanning Tunnelling Microscopy, AFM-Atomic Force Microscopy) for fine and reproducible patterning.

Nanometer scale structures in which dimensional confinement (e.g. resonant tunnelling, Coulombic effects...) become first order effects will result in new opportunities and concepts to take full advantage of low power quantum electronics. However, the path to the optimal use of these effects in solving problems of mainstream technology is still not clear. On the other hand, scanning probe microscopy (SPM) techniques that have demonstrated potential for atomic-level manipulation of matter have not yet been fully developed to solve fine patterning constraints at the nanometer scale.

The QUEST project has the objective to develop device concepts and fabrication techniques relevant for future industrial applications:

- the integration of memory circuits using the Coulomb blockade is probably the most obvious application that meets the scaling and low-power requirements necessary for the giga to tera bit capacity.
- processing (deposition, etching, oxidation), experimental, and theoretical developments necessary to this project will contribute to further developments of microelectronics. In particular, the fabrication sequence proposed for the integration of the memory cell will also allow for the fabrication of MOSFETs with ultimate dimensions. This constitutes an intermediate milestone of major interest for potential applications that combine quantum and conventional silicon-based devices
- the introduction of the SPM for direct device applications could probably provide a driving force for the evolution of this technique as a highly performant fabrication tool. In addition, this project directly supports our industrial partners OMICRON and INSTRUMAT on SPM usage.

The operating principle of the memory is based on the storage of very few electrons (possibly one) in a floating gate embedded between a MOSFET channel and a command gate. Memory operation is achieved as following: by applying a positive gate voltage an electron is transferred to the storage dot and increases its potential that blocks the transfer of others electrons. The trapping of an electron in the dot shifts the threshold voltage of the MOSFET that can be detected to sense the information (formation of an hysteris on the current/gate-voltage characteristic). The novelty and originality of the approach lies in the fabrication of such an advanced memory cell using SPM techniques combined with self-aligned thin-film deposition and etching.

Funding Scheme

CSC - Cost-sharing contracts

Coordinator

Institut Superieur D'electronique Du Nord - Recherche
Address
Rue Solferino 90
59046 Lille
France

Participants (4)

Centre National de la Recherche Scientifique - Delegation Regional Paris B
France
Address
Rue Pierre Et Marie Curie 16
75005 Paris
Instrumat Sa
France
Address
Avenue Des Andes 4
91943 Les Ulis A
Omicron Vakuumphysik Gmbh
Germany
Address
Idsteiner Strasse 78
65232 Taunusstein
Université Catholique de Louvain Laboratoire de Microelectronique
Belgium
Address
Place Du Levant 3
1348 Louvain-la-neuve