Skip to main content

Extremely fast silicon transistor based on carrier velocity modulation

Objective

The current trend in microelectronics is the high end silicon devices and circuits will be processed on wafers with a very thin silicon-on-insulator (SOI) layer. In this project the feasibility to realise a novel, extremely fast silicon transistor based on carrier velocity modulation will be investigated. These SOI velocity modulation transistor (VMT) may have intrinsic and extrinsic operation speed of several hundreds of GHz. The SOI VMT can replace high speed 3-5- transistors, e.g., in telecommunication and automotive radar applications.

OBJECTIVES
The objectives in this work are to:
1) Realise a dual gate velocity modulation transistor on ultra-thin SOI substrate;
2) Experimentally and theoretically define the optimum operation point for velocity modulation switching;
3) Perform Monte Carlo simulations on transport and switching properties of a velocity modulation transistor realised on substrates with ultra-thin SOI films.

DESCRIPTION OF WORK
The work includes the following tasks:
- Device fabrication: The test structures and devices will be fabricated on thin SOI wafers. The process includes fabrication of thin SOI wafers with highly doped handle wafers for back gating and device processing on the wafers. For structural characterisation ultra-thin SOI films can be realised by thermal oxidation and stripping the sacrificial oxide;
- Structural characterisation: The devices structures will be characterised using XDR, AFM, HRSEM and TEM;
- Transport measurements: The electrical characteristics of the VMT structures will be studied using field effect mobility measurements and low temperature Hall measurements. For AC measurements, a set-up up to 110 GHz is available;
- Modelling and theoretical aspects: The VMT devices will be simulated using one particle and ensemble Monte Carlo schemes. The scattering mechanisms include contributions of phonons scattering, interface roughness scattering and Coulomb scattering. The phonons are confined in the thin SOI films and this affects the phonon scattering. The transient response of the SOI VMTs can be deduced by ensemble Monte Carlo.

Funding Scheme

ACM - Preparatory, accompanying and support measures

Coordinator

VALTION TEKNILLINEN TUTKIMUSKESKUS (VTT)
Address
Vuorimiehentie 5
02044 Espoo
Finland

Participants (2)

THE UNIVERSITY OF TOKYO
Japan
Address
7-3-1 Hongo, Bunkyo-ku
113-8654 Tokyo
UNIVERSIDAD DE GRANADA
Spain
Address
Cuesta Del Hospicio, S/n
18071 Granada