Objective The project objective is to investigate the application of microelectronics integration and packaging techniques to the radio front end for mobile and wireless telephones of different standards operating at 900 MHz (GSM), 1.5 GHz (Immarsat M), 1.8 GHz (DCS 1800/PCN) and 1.9 GHz (DECT). Emphasis will be given to evolution from second generation terminals toward UMTS, by creating a library of basic radio frequency building blocks, ie. transmit mixers, receive mixers, phase shifters, VCO, and PLL, in a high frequency silicon bipolar process suitable for multi-standard operation. Novel techniques will be investigated and developed, to have a major impact on low-cost, high volume packaging for RF integrated front end applications.The application has been investigated of microelectronics integration and packaging techniques to the radio front end for mobile and wireless telephones of different standards operating at 900 MHz, 1.5 GHz, 1.8 GHz and 1.9 GHz. Emphasis was given to evolution from second generation terminals towards universal mobile telecommunications system (UMTS), by creating a library of basic radio frequency building blocks (ie transmit mixers, receive mixers, phase shifters voltage controlled oscillators (VCO) and phase locked loops (PLL)) in a high frequency silicon bipolar process suitable for multistandard operation. Following the definition of the radio frequency (RF) specifications, (focused mainly on a homodyne structure, but with application to others), and a study of heterodyne image rejection architectures, the project concentrated on the design, fabrication and test of a set of low voltage (2.7 V), low power basic RF building blocks and combinations of the latter, using an ESPRIT (TIP BASE) developed high frequency bipolar process. In parallel, an electroless chip bumping process is being developed, with special consideration to RF characteristics. The chips themselves are to be assembled using electroless bumps and tape automated bonding (TAB) flip chip techniques. First results have been obtained on nickel bumping and the flip chip process.Technical Approach Following the definition of the RF specifications, (focused mainly on a homodyne structure, but with application to others), and a study of heterodyne image rejection architectures, the project now concentrates on the design, fabrication and test of a set of low voltage (2.7V) low power basic RF building blocks and combinations of the latter, using an ESPRIT (TIP BASE) developed high-frequency bipolar process. In parallel, an electroless chip bumping process is being developed, with special consideration to RF characteristics. The chips themselves are also being developed, especially the integrated front ends. These will be assembled using electroless bumps and TAB/flip-chip techniques. Key Issues - Zero-IF receiver for multi-standard operation.- Digital low IF Image Rejection receiver design.- Low voltage (2.7V) low power RF operation.- Low cost, high volume RF packaging. Expected Impact Project results will contribute to the UMTS standardisation with the experience and results of the project, in terms of the techno-economic feasibility scope. Results will be useful to designers and manufacturers of mobile, wireless, UMTS and integrated satellite and cellular mobile systems terminals, and potentially base stations, by providing basic building block and packaging techniques for low voltage, low power, highly integrated RF front end components that will help reduce their cost, volume and weight. In this way, the project may facilitate the penetration of mobile and wireless equipment suitable to perform UMTS services in the market. Fields of science engineering and technologyelectrical engineering, electronic engineering, information engineeringinformation engineeringtelecommunicationsradio technologyradio frequencynatural scienceschemical sciencesinorganic chemistrytransition metalsengineering and technologymechanical engineeringvehicle engineeringaerospace engineeringsatellite technologynatural sciencesphysical scienceselectromagnetism and electronicsmicroelectronicsnatural scienceschemical sciencesinorganic chemistrymetalloids Programme(s) FP3-RACE 2 - Specific research and technological development programme (EEC) in the field of communication technologies, 1990-1994 Topic(s) Data not available Call for proposal Data not available Funding Scheme Data not available Coordinator ALCATEL STANDARD ELECTRICA EU contribution No data Address RAMIREZ DE PRADO 5 28045 MADRID Spain See on map Total cost No data Participants (7) Sort alphabetically Sort by EU Contribution Expand all Collapse all ALCATEL RADIOTELEPHONE France EU contribution No data Address 32 AVENUE KLEBER 92707 COLOMBES See on map Total cost No data ASEA BROWN BOVERI NERA Norway EU contribution No data Address BERGERVEIEN 12 1361 BILLINGSTAD See on map Total cost No data BELL TELEPHONE MANUFACTURING CY. N.V. Belgium EU contribution No data Address FRANCIS WELLESPLEIN 1 2018 ANTWERPEN See on map Total cost No data NATIONAL MICROELECTRONICS RES. CENTRE Ireland EU contribution No data Address UNIVERSITY COLLEGE LEE MALTINGS PROSPECT ROW CORK See on map Total cost No data Swindon Silicon Systems Ltd United Kingdom EU contribution No data Address Radnor Street SN1 3PR Swindon See on map Total cost No data Thomson Microelectronics Srl (SGS) Italy EU contribution No data Address Via C. Olivetti 20041 Agrate Brianza Milano See on map Total cost No data UNIVERSIDAD POLITECNICA DE MADRID Spain EU contribution No data Address E.T.S.I. DE TELECOMUNICACION, CIUDAD UNIVERSITARIA 28040 MADRID See on map Total cost No data
