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Making faster chips a reality

In the pursuit of greater computing power, the microprocessors and other integrated circuits and chips at the heart of computers are being driven at ever higher clock rates. The CODESTAR project has addressed some of the issues in chip design resulting from these higher clock frequencies.

Digital Economy

Integrated circuits, or silicon chips, for applications such as computing or information processing are driven by a regular electronic signal known as a clock. In order to increase processing speeds or data transmission rates, these clock rates are increased, producing new side effects due to higher frequency electromagnetic radiation. Chip designers need to be able to simulate these effects in a way that can be incorporated into their models of circuits in order to produce successful circuit structures and layouts. The CODESTAR project has developed software, called an electromagnetic field-solver, that conducts an analysis of the high-frequency effects produced by a particular circuit. The list of circuit elements producing significant effects is usually too large to be used directly in a circuit simulation. Therefore the project has developed a system, based on reduced-order modelling, that produces a shorter list of equivalent structures that can be incorporated in a simulation model of a circuit while producing the same effects. The CODESTAR methodology and software thus extract models of high-frequency effects such as cross-talk that are more compact than the full description. When introduced into circuit designs in standard simulation software, these models reduce the time required for a particular simulation by an order of thousands. The methodology and software were also tested and benchmarked against standard structures to ensure their accuracy. The system is particularly useful for radio-frequency designs for wireless applications and has potential for building libraries of models of new elements for nano-electronics. The project has also produced a software toolkit, called a workbench, for comparing and testing simulation models.

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