Periodic Reporting for period 1 - EleGaNT (GaN Transistor Integrated Circuits)
Berichtszeitraum: 2021-01-01 bis 2022-03-31
Discrete GaN power electronic devices have entered the consumer market and first products have amply demonstrated a disruptive improvement of the performance and reduction of the form factor of power systems. GaN power electronics devices are supporting the strive for sustainable energy through improved efficiency and reduction of the bill of materials of power systems.
With demonstrated robustness for heavy ion radiation and neutron radiation, p-GaN enhancement mode HEMTs allow disruptive innovative designs for space applications.
However, to unlock the full potential of the technology for point of load convertors, three important limitations need to be solved, as addressed in this project, i.e.
1) The reduction of the inductive parasitics through monolithic integration of drivers and power devices (GaN-IC).
2) Optimization of the inductive passive components together with the active devices
3) A strong interaction between point of load convertor design and GaN-IC design
This project contributes to EU non-dependence of GaN technology as discrete GaN transistors are, so far, mostly produced by Asian and/or North American manufacturers and pushes the state-of-the-art with higher level of integration (GaN-IC).
The key technical objective of the project is to design and evaluate the performance in space environment of GaN-IC integrated circuits for high current applications, using a European non-dependent supply chain.
As design objective, the project aims at overcoming the limitations of parasitic inductance and capacitance by designing a GaN power ASIC.
From the technology side, two specific objectives are targeted: 1) Improvement of the robustness against radiation of the GaN-IC building blocks and final chip, and 2) Improvement of the compactness of the inductor which has high impact on the size and weight of the power convertor module.
From the end user side, the project wants to demonstrate a prototype very high current space application, and a prototype low current space application. Next to the space applications, the project explores the technology for terrestrial applications.
With demonstrated robustness for heavy ion radiation and neutron radiation, p-GaN enhancement mode HEMTs allow disruptive innovative designs for space applications.
However, to unlock the full potential of the technology for point of load convertors, three important limitations need to be solved, as addressed in this project, i.e.
1) The reduction of the inductive parasitics through monolithic integration of drivers and power devices (GaN-IC).
2) Optimization of the inductive passive components together with the active devices
3) A strong interaction between point of load convertor design and GaN-IC design
This project contributes to EU non-dependence of GaN technology as discrete GaN transistors are, so far, mostly produced by Asian and/or North American manufacturers and pushes the state-of-the-art with higher level of integration (GaN-IC).
The key technical objective of the project is to design and evaluate the performance in space environment of GaN-IC integrated circuits for high current applications, using a European non-dependent supply chain.
As design objective, the project aims at overcoming the limitations of parasitic inductance and capacitance by designing a GaN power ASIC.
From the technology side, two specific objectives are targeted: 1) Improvement of the robustness against radiation of the GaN-IC building blocks and final chip, and 2) Improvement of the compactness of the inductor which has high impact on the size and weight of the power convertor module.
From the end user side, the project wants to demonstrate a prototype very high current space application, and a prototype low current space application. Next to the space applications, the project explores the technology for terrestrial applications.
In the first 15 months of the project, detailed technical specifications have been defined in a joined effort between end users, chip designers and technology providers for the active and passive components. The design of the building blocks for the GaN-IC, as well as a first version of the full IC has been completed, the building blocks and full IC have been layouted and the mask set floorplan complemented with process validation modules (PVM).
The masks have been ordered and introduced in the 200mm fab of imec, and are presently being used for the processing of the first lots in the 100 Volt GaN-on-Si and GaN-on-SOI technology of imec.
In the meantime, the first learning cycle of the design and manufacturing of the inductor has been finalized. The inductor has been characterized and shown to reach the specifications.
Preparative work has been ongoing for the definition of all test plans for PVM testing, building block and full GaN-IC testing, radiation testing and Point of Load convertor testing, and the activities for design and manufacturing of the test boards are ongoing.
The masks have been ordered and introduced in the 200mm fab of imec, and are presently being used for the processing of the first lots in the 100 Volt GaN-on-Si and GaN-on-SOI technology of imec.
In the meantime, the first learning cycle of the design and manufacturing of the inductor has been finalized. The inductor has been characterized and shown to reach the specifications.
Preparative work has been ongoing for the definition of all test plans for PVM testing, building block and full GaN-IC testing, radiation testing and Point of Load convertor testing, and the activities for design and manufacturing of the test boards are ongoing.
The IMEC GAN-IC platform, offers in GaN-on-Si or GaN-on-SOI technology, a suite of active and passive devices including p-GaN HEMT power devices, low-voltage p-GaN HEMT transistors, high-ohmic and low-ohmic resistors and back-end MIM capacitors supported by a PDK with DRC, LVS and compact modelling. The flexibility for technology/design interaction offers a unique opportunity for customization and prototyping, fostering ground-breaking innovation in the design of monolithic integrated power functions.
The EleGaNT project will drastically improve the current capability adding not only better performance and a low footprint, but also simplifying the implementation owning to the embedded driver.
State-of-the-art passives devices, in particular inductors, are limiting the performance of Point-of-Load convertors when using GaN transistors as the switching elements in terms of efficiency and solution size. With novel inductors tailored to the characteristics of GaN based convertors, the advantages of GaN can be fully exploited which leads to smaller solution size and better cost competitiveness.
The EleGaNT project will drastically improve the current capability adding not only better performance and a low footprint, but also simplifying the implementation owning to the embedded driver.
State-of-the-art passives devices, in particular inductors, are limiting the performance of Point-of-Load convertors when using GaN transistors as the switching elements in terms of efficiency and solution size. With novel inductors tailored to the characteristics of GaN based convertors, the advantages of GaN can be fully exploited which leads to smaller solution size and better cost competitiveness.