Cross-layer resilience for rack-scale disaggregated memory

Project Information

SHEPHERD

Grant agreement ID: 101029391

DOI

10.3030/101029391

Project closed

EC signature date 29 March 2021

Start date 1 September 2021

End date 30 December 2024

Funded under

• EXCELLENT SCIENCE - Marie Skłodowska-Curie Actions

Total cost

€ 145 941,12

EU contribution

€ 145 941,12

Coordinated by

UNIVERSITY OF CYPRUS
Cyprus

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Links to deliverables and publications from FP7 projects, as well as links to some specific result types such as dataset and software, are dynamically retrieved from OpenAIRE .

Publications

Other (1)

Analyzing a Two-Tier Disaggregated Memory Protection Scheme Based on Memory Replication

Author(s): Haris Volos, Yiannakis Sazeides
Published in: Technical Report, 2025
Publisher: arXiv
DOI: 10.48550/arxiv.2502.17138

Peer reviewed articles (3)

The Case for Replication-Aware Memory-Error Protection in Disaggregated Memory

Author(s): Haris Volos
Published in: IEEE Computer Architecture Letters, Issue 20, 2022, Page(s) 130-133, ISSN 1556-6056
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/lca.2021.3110439

Agile C-states: A Core C-state Architecture for Latency Critical Applications Optimizing both Transition and Cold-Start Latency

Author(s): Georgia Antoniou, Davide Bartolini, Haris Volos, Marios Kleanthous, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Ziwei Li, Onur Mutlu, Yiannakis Sazeides, Jawad Haj Yahya
Published in: ACM Transactions on Architecture and Code Optimization, Issue 21, 2024, Page(s) 1-26, ISSN 1544-3566
Publisher: Association for Computing Machinary, Inc.
DOI: 10.1145/3674734

Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories

Author(s): Lei Chen, Jiacheng Zhao, Chenxi Wang, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, Guoqing Harry Xu, Huimin Cui
Published in: ACM Transactions on Computer Systems, Issue 39, 2023, Page(s) 1-38, ISSN 0734-2071
Publisher: Association for Computing Machinary, Inc.
DOI: 10.1145/3511211

Conference proceedings (3)

AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications

Author(s): Jawad Haj Yahya, Haris Volos, Davide B. Bartolini, Georgia Antoniou, Jeremie S. Kim, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Zhirui Chen, Ye Geng, Onur Mutlu, Yiannakis Sazeides
Published in: 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2024, Page(s) 835-850
Publisher: IEEE
DOI: 10.1109/micro56248.2022.00063

Taming Performance Variability caused by Client-Side Hardware Configuration

Author(s): Georgia Antoniou, Haris Volos, Yiannakis Sazeides
Published in: IEEE International Symposium on Workload Characterization (IISWC), 2024
Publisher: IEEE
DOI: 10.1109/iiswc63097.2024.00018

AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers

Author(s): Georgia Antoniou, Haris Volos, Davide B. Bartolini, Tom Rollet, Yiannakis Sazeides, Jawad Haj Yahya
Published in: 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022, Page(s) 851-867
Publisher: IEEE
DOI: 10.1109/micro56248.2022.00065