Project description
The first all-European RISC-V cloud server infrastructure
The revolutionary instruction set architecture (ISA) known as RISC-V is not new. Open-source and free ISA was developed more than a decade ago. However, new momentum is growing. RISC-V remains attractive because it is free to license and has just a few instructions in the base architecture. In this context, the EU-funded RISER project will develop the first all European RISC-V cloud server infrastructure. The project will integrate low-power components into an innovative energy-efficient cloud architecture. It will build an accelerator platform, which includes the Arm-based Rhea processor from EPI and a PCIe acceleration board, and a microserver platform, which interconnects up to 10 microserver boards, each one supporting up to four RISC-V chips coupled with high-speed storage and networking.
Objective
Building on top of outcomes from the EPI and EUPilot projects, RISER will develop the first all-European RISC-V cloud server infrastructure, significantly enhancing Europe's open strategic autonomy. RISER will leverage and validate open hardware high-speed interfaces combined with a fully-featured operating system environment and runtime system, enabling the integration of low-power components, including the RISC-V processor chips from EPI and EUPilot and LPDDR4 memories, in a novel energy-efficient cloud architecture.
RISER brings together a set of 7 partners from industry and academia to jointly develop and validate open-source designs for standardized form-factor system platforms suitable for supporting cloud services. Specifically, RISER will build the following two cloud infrastructures:
(1) An accelerator platform, which includes the ARM-based RHEA processor from EPI and a PCIe acceleration board that will be developed within the project which will integrate up-to four RISC-V based EPI and EUPilot chips.
(2) A microserver platform, which interconnects up to ten microserver boards all developed by the project, each one supporting up to four RISC-V chips coupled with high-speed storage and networking. Embracing hyperconvergence, the microserver architecture will allow for distributed storage and memory to be used by any processor in the system with very low overhead.
The open-source system board designs of RISER will also be accompanied by open-source low-level firmware and systems software, and a representative Linux-based software stack to support cloud services. To evaluate and demonstrate the capabilities of the RISER platforms we will develop three use cases: (a) Acceleration of compute workloads, (b) Networked object and key-value storage, and (c) Containerized execution as part of a provider-managed IaaS environment. RISER will offer open access to the microserver platform, facilitating uptake and enhancing the commercialization path of project results.
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Programme(s)
Funding Scheme
HORIZON-RIA - HORIZON Research and Innovation ActionsCoordinator
70013 Irakleio
Greece