A Paradigm Change for System-on-Chip Design to Enable Higher Performance with Lower Time-to-Market and Cost

Projektinformationen

EmpoSoC

ID Finanzhilfevereinbarung: 101165845

DOI

10.3030/101165845

EK-Unterschriftsdatum 29 März 2024

Startdatum 1 April 2024

Enddatum 30 September 2026

Finanziert unter

• The European Innovation Council (EIC)

Gesamtkosten

€ 4 078 656,25

EU-Beitrag

€ 2 499 999,00

Koordiniert durch

DEFACTO TECHNOLOGIES
France

Periodic Reporting for period 1 - EmpoSoC (A Paradigm Change for System-on-Chip Design to Enable Higher Performance with Lower Time-to-Market and Cost)

Berichtszeitraum: 2024-04-01 bis 2025-03-31

Zusammenfassung vom Kontext und den Gesamtzielen des Projekts

Since the COVID pandemic, we have been facing an increase in prices for semiconductor components, leading to extended delivery times that can result in shortages impacting the semiconductor industry. Europe accounts for only about 10% of the global market share in the production of these strategic components and is highly dependent on suppliers from third countries, especially in Asia (China, Korea, Taiwan, Japan) and the USA. Recognizing the situation, European authorities have expressed their desire to create a cutting-edge European semiconductor ecosystem that includes production. This strategy has recently been implemented in the "EU chips act," with the stated goal of doubling Europe's share in global chip production from 10% to 20% by 2030, effectively quadrupling production capacity on European soil. Moreover, Europe is facing a challenge with the availability of a qualified workforce: designers need to be more productive and require automated solutions.

The EmpoSoC project is fully aligned and addresses the challenges raised by the European Chip Act. The EmpoSoC project will help establish European leadership in the dynamic, global, and highly competitive market of Chip design. It's not only about the competitiveness of the European offering in Chip building platforms; the crucial issue is the technological sovereignty of the semiconductor industry.
EmpoSoC will enable to design more complex System on Chips (SoCs) for high-performance and for low-power electronic devices with a lower cost.

Arbeit, die ab Beginn des Projekts bis zum Ende des durch den Bericht erfassten Berichtszeitraums geleistet wurde, und die wichtigsten bis dahin erzielten Ergebnisse

The first step in our technical work was related to completing of the Defacto’s SoC Design platform, to be able to generate library of Subsystems along with a software solution to build the overall system. We developed the first successfully, to be able to start creating the subsystems using the EmpoSoC solution. During this first period of the project, Defacto extended the existing software platform called SoC Compiler. All the features needed toward building subsystems and systems have been implemented.
Secondly, we started building the first subsystems along with the related file generation process. We targeted both Arm-based and RISC-V (open sources) SoCs mainly because RISC-V is becoming a strategic technology and its interest is increasing significantly world-wide. Indeed, RISC-V being an open architecture built on global standards and open-source principles, it is key for the future of semiconductor in Europe.

During this period, we have also put in place the first algorithms to generate pre-connected subsystems and complete systems. During this first year of the project, the focus was made on two market segments IoT and HPC.
We also have succeeded on strengthening our partnerships which are required for project.

Fortschritte, die über den aktuellen Stand der Technik hinausgehen und voraussichtliche potenzielle Auswirkungen (einschließlich der bis dato erzielten sozioökonomischen Auswirkungen und weiter gefassten gesellschaftlichen Auswirkungen des Projekts)

As a first result, and with a minimum inputs as user requirements we are now in capacity to generate pre-connected subsystems, by identifying the involved IP cores in a design project.
Second result, we are now in capacity to reuse design information from previous project designs to complete and extend the pre-connected subsystems and systems.
Third, when starting a new design project, EmpoSoC can now generate first specification files and help users complete these files.
Finally, we have now a ready to use design platform that helps managing known design formats and generating all necessary files for both synthesis and design verification flows.