During RP1, a number of key achievements have been made by the QOSiLICIOUS team. In relation to the objectives, the following has been obtained:
- Obj. 1: Enhance silicon IC platforms with efficient quantum-optic light emitters
Several CMOS LED designs for monolithic QRNG development were investigated at AIT, including deep-N-well, P-well, and an 8-dot structures. Simulations together with a camera-based characterization of the emitted light intensity was performed, indicating that the LED in P-well is more favorable for SPAD photon detection inside the QRNG pixel. Together with the SPAD and two versions of active quenchers (5 V and 10 V swing), these test structures were brought to tape-out by AIT in January 2026. Final photon count rate measurements will be carried out once the chip with integrated quencher is received from manufacturer X-Fab (expected after April 30 2026).
In parallel, a SiGe light source for the QKD transmitter module was fabricated at IHP and characterized. The results showed LED-like emission in both the C and L telecom wavebands, with output powers suitable for QKD applications. This confirmed the SiGe source as a well-suited candidate for integration into QKD state-preparation circuits as planned in the project.
- Obj. 2: Development of highly miniaturized QRNG pixels and QKD transmitters
Simulations of the CMOS SPAD and its interaction with the integrated Si LED were performed at AIT, and concluded the unsuitability of the initially considered narrow SPAD due to limited carrier collection and high dark count rates. As a consequence, a wider SPAD design was chosen. In parallel, two active quenching circuits (with a 5 V and 10 V swing) were designed at AIT to improve photon detection performance. The complete pixel layout indicates that a true random number rate of 2.5 Mb/s should be possible. The QRNG test structures were brought to tape-out by AIT in January 2026.
Concerning the QKD transmitter module, a QKD transmitter integrating a SiGe light source and a polarization encoding circuit was fabricated at IHP. Initial tests confirmed operation of the source and modulators, with results feeding into the second design cycle where the coupling to the monitor diodes will be optimized to reduce on-chip loss and SiGe the source will be updated to a generation 3 source.
- Obj. 3: Development of a GeSi-based single-photon detector for quantum applications
Following joint design iterations and feasibility assessments for waveguide-coupled SPADs (offering a promising route towards direct integration within silicon photonics chips) between IHP and UGLA, two device concepts were selected for fabrication at IHP, with the first run underway and chips expected in Q2 2026. In parallel, surface-normal SPADs have been further developed at UGLA, with process improvements targeting lower dark count rates, higher operating temperatures, and enhanced detection performance in the C-band.
- Obj. 4: Demonstration of cost-effective QKD in intra-datacenter and access/6G applications
As most tasks relevant to this Objective have not yet started, no measurable progress can be reported at this stage. However, initial requirements for the evaluation of the planned use cases have been defined by NVD together with all partners. Additionally, initial characterizations have been performed by AIT concerning solar-blind short-range QKD and suitability of multi-lane ribbon cables for QKD implementations. Precursor technology has further been employed to perform dynamic key allocation in the context of point-to-multipoint network architectures.