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Open Design Ecosystem for European Chips - Productivity, Interoperability, Verification

Ziel

ODE4EC-PIV (Open Design Ecosystem for European Chips - Productivity, Interoperability, Verification) addresses the growing demand for accessible, efficient, and trustworthy digital design workflows by developing a next-generation suite of open-source EDA tools focused on design productivity, interoperability, and scalable verification. The project will provide a modular framework for design entry, hardware/software co-design, formal and scenario-based verification, waveform analysis, and cross-domain integration, as well as sophisticated, AI-assisted tools for productivity and usability enhancements. It is aimed at small and medium-sized businesses, startups, academic institutions, and emerging design ecosystems.

In addition to encouraging usability and automation, ODE4EC-PIV will expand open-source capabilities for RTL development, high-level synthesis, and design space exploration. Verification processes will be in line with industry norms, guaranteeing cross-domain applicability. The project will release training materials as open educational resources, contribute to open standards, and integrate with popular tool ecosystems. Adoption will be increased by widespread distribution via open hardware communities, business settings, scholarly conferences, and EU platforms.

Aligned with the Chips Act and the ECS SRIA, ODE4EC-PIV will support strategic autonomy in semiconductor design and contribute to Europe’s capacity to train, attract, and empower the next generation of digital hardware engineers through open, collaborative innovation.

Wissenschaftliches Gebiet (EuroSciVoc)

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Schlüsselbegriffe

Programm/Programme

Thema/Themen

Finanzierungsplan

HORIZON-JU-IA - HORIZON JU Innovation Actions

Alle im Rahmen dieses Finanzierungsinstruments finanzierten Projekte anzeigen

Aufforderung zur Vorschlagseinreichung

(öffnet in neuem Fenster) HORIZON-JU-CHIPS-2025-IA-EDA-two-stage

Alle im Rahmen dieser Aufforderung zur Einreichung von Vorschlägen finanzierten Projekte anzeigen

Koordinator

INESC TEC - INSTITUTO DE ENGENHARIADE SISTEMAS E COMPUTADORES, TECNOLOGIA E CIENCIA
Netto-EU-Beitrag
€ 427 500,00
Adresse
RUA DR ROBERTO FRIAS CAMPUS DA FEUP
4200 465 Porto
Portugal
Region
Continente Norte Área Metropolitana do Porto
Aktivitätstyp
Research Organisations
Links
Gesamtkosten
€ 855 000,00

Beteiligte (23)