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Advanced Single-Chip ASIC Plastic Packaging

Objective

The main objective of ASAP is to develop high-performance single chip plastic packages with high reliability. An important goal of the project is to understand the influence of the plastic packaging process and the surface mounting method on the reliability and performance of high-speed digital and analog ASICs.
For both small and large body size plastic quad flat pack (PQFP) packages, the package definition and specifications for moulding and trim and form tools have been finalized. The development of 0.5 mm lead pitch packages has already resulted in the availability of mechanical samples for the reliability evaluation of the developed PQFP packages and for the assessment of surface mounting capabilities on printed circuit boards. The definition of process windows for the selected materials and the optimization of the related processes and materials is proceeding as planned.

With respect to the development of power PQFP, complete drawings and tool specifications have been finalized. The major effort went into the design of the slug and the selection of slug material.

Preliminary three dimensional finite element thermomechanical analysis has been performed for small and large body size PQFP packages with reduced thickness. Preliminary warpage analysis of the developed power PQFP has been used for the optimization of the package structure.

Novel accelerated humidity test methods are being evaluated as potential alternative stress methods for fine pitch PQFP packages and power PQFP packages. Dedicated submicron complementary metal oxide semiconductor (CMOS) testchips have been developed in order to check the influence of the PQFP package on device stability and performance.

Specific advanced equipment has been investigated for the handling, testing and burn in of fine pitch PQFP packaged devices. The activities related to the definition of manufacturing methods and the associated process proofing of the interconnection of the PQFP package on the printed circuit board have been started. Production validation has started for the small and large body size PQFP packages with 0.5 mm lead pitch.
The project will concentrate on the further development of three types of advanced plastic quad flat-pack (PQFP) packages:

- small body size with reduced thickness and lead pitches down to 0.3 mm
- large body size with reduced thickness and lead pitches plus high pincounts
- power packages capable of dissipating power levels up to 10 watts.

These three types of packages will be fully defined and characterised and made available to the project partners for reliability assessment, surface mounting on PCBs and product validation.

A thorough evaluation of plastic packaging enhanced reliability problems will be carried out using advanced test vehicles and characterisation methods, conventional and novel schemes for accelerated stress testing, and the application and improvement of the most relevant techniques for failure analysis and evaluation.

Finally, a methodology for the qualification of high-performance and high-reliability ASIC components will be defined using modified test methods and test sequences that are faster than those presently in use.

Coordinator

MIETEC
Address
Westerring, 15
9700 Oudenaarde
Belgium

Participants (6)

ASM FICO TOOLING
Netherlands
Address
Nijverheidsstraat, 14-16, 31
6914 AD Herwen
Alcatel SEL AG
Germany
Address
Lorenzstraße 10
70435 Stuttgart
BELL TELEPHONE MANUFACTURING
Belgium
Address
Francis Wellesplein, 1
2018 Antwerpen
NATIONAL MICROELECTRONICS RESEARCH CENTRE
Ireland
Address
Prospect Row
Cork
SGS THOMSON MICROELECTRONICS SA
France
Address
7 Avenue Gallieni
92253 Gentilly
Siemens AG
Germany
Address
Otto-hahn-ring 6
81739 München