Skip to main content
Weiter zur Homepage der Europäischen Kommission (öffnet in neuem Fenster)
Deutsch de
CORDIS - Forschungsergebnisse der EU
CORDIS
Inhalt archiviert am 2024-05-29

Multiple-valued applications of negative-differential resistance devices in asynchronous circuits design

Ziel

The project targets the post-CMOS era technologies. It focuses on the digital logic applications of negative-differential resistance (NDR) semiconductor nano-devices.

NDR property appears in nano-meter scale devices due to quantum resonant tunnelling or Coulomb blockade effects and inherently introduces strong binary and multiple-valued processing capacities of the devices like resonant-tunnelling diodes (RTD), single-electron transistors (SET), carbon nanotubes (CNT).

Due to technological reasons multiple-valued logic has not yet found its way to the mainstream. However, there are applications in which it may boost the computational capabilities of the digital circuitry. Among others, a very interesting domain is an asynchronous circuit design where it is well known that ternary logic enables delay-insensitivity, a property that has been long quested for and traded off in the binary domain.

Thus in our project we are building a new methodology for the nano-electronic circuits design that merges the capabilities of these two in order to provide high-speed and compact delay-insensitive asynchronous circuits. We complement NDRs with the ternary so-called NULL-Convention Logic (NCL), since we observe a lot of synergies between them to be exploited.

The blend is designed to make both capitalise on the approach. For NCL we expect compact and high-speed circuitry, for NDR we expect new possibilities in the power management and optimisation. These goals engage research in a variety of topics from devices technology through logic design to the design automation and optimisation.

The success of the project allows for the applications in many domains: from high performance computing, where quantum nano-devices provide high-frequency switching and asynchronous design provides average instead of worst case performance; to battery-efficient autonomous and embedded systems where the merge provides an un-paralleled level subtlety in power management and optimisation.

Wissenschaftliches Gebiet (EuroSciVoc)

Schlüsselbegriffe

Thema/Themen

Aufforderung zur Vorschlagseinreichung

FP6-2005-MOBILITY-6
Andere Projekte für diesen Aufruf anzeigen

Finanzierungsplan

OIF - Marie Curie actions-Outgoing International Fellowships

Koordinator

INSTITUT NATIONAL POLYTECHNIQUE DE GRENOBLE
EU-Beitrag
Keine Daten
Gesamtkosten
Keine Daten

Beteiligte (1)