Resultado final
This deliverable will specify in detail the systems software that will unify different existing programming models as well as the programming environment that will take full advantage of the novel features of the ECOSCALE system.
Guidelines for efficiently programming ECOSCALEBased on the porting of the beneficiaries' applications, this deliverable will provide guidelines for programming efficiently on the ECOSCALE platform.
Application analysis and system requirementsThis deliverable will include the results from the analysis of the beneficiaries applications in terms of performance communication and power requirements Moreover based on this analysis this deliverable will report the essential system attributes and requirements that the ECOSCALEframework should provide
Specifications of Reconfigurable systems and ToolsThis deliverable will specify in detail the specifications of the reconfigurable hardware system, of the software for implementing the reconfiguration features, as well as of the high-level hardware synthesis tool.
Evaluation of ECOSCALE platformThis deliverable will provide the report that describes the evaluation of the ECOSCALE platform using the applications of the beneficiaries.
Specs of Architecture and PrototypeThis deliverable will identify the system components of the ECOSCALE architecture, their roles in the system and their interfaces. Moreover, it will provide the specifications of the ECOSCALE prototype.
Report on Co-design aspectsThis deliverable will report the results from the monitoring, tuning and refinement of the co-design approach between the technical work packages and the applications development.
System integration and validationThis deliverable includes a report that describes the system-level integration and validation of the software and hardware components of the ECOSCALE platform.
This deliverable will provide an integrated tool flow that will support the deployment of the hardware implementation of the kernels onto the platform developed in WP4. A report will also be provided as part of the deliverable.
Development UNIMEM + UNILOGIC architectureThis deliverbale will provide the reconfigurable design and implementation of the UNIMEM and UNILOGIC architecture. A report will also be provided as part of the deliverable.
Platform simulatorThis deliverable will provide a scalable, abstract, yet precise enough simulation model that will be used to optimize various aspects and parameters of the architecture. A report will also be provided as part of the deliverable.
This deliverable includes the preparation and maintenance of the website.
Publicaciones
Autores:
Liang Ma, Luciano Lavagno, Mihai Teodor Lazarescu, Arslan Arif
Publicado en:
IEEE Access, Edición 5, 2017, Página(s) 18953-18974, ISSN 2169-3536
Editor:
Institute of Electrical and Electronics Engineers Inc.
DOI:
10.1109/ACCESS.2017.2750923
Autores:
Fahad Bin Muslim, Liang Ma, Mehdi Roozmeh, Luciano Lavagno
Publicado en:
IEEE Access, Edición 5, 2017, Página(s) 2747-2762, ISSN 2169-3536
Editor:
Institute of Electrical and Electronics Engineers Inc.
DOI:
10.1109/ACCESS.2017.2671881
Autores:
Arslan Arif, Felipe A. Barrigon, Francesco Gregoretti, Javed Iqbal, Luciano Lavagno, Mihai Teodor Lazarescu, Liang Ma, Manuel Palomino, Javier L. L. Segura
Publicado en:
Journal of Real-Time Image Processing, 2018, ISSN 1861-8200
Editor:
Springer Verlag
DOI:
10.1007/s11554-018-0792-x
Autores:
Ahsen Ejaz, Vassilios Papaefstathiou, Ioannis Sourdis
Publicado en:
ACM Transactions on Architecture and Code Optimization, Edición 15/2, 2018, Página(s) 1-24, ISSN 1544-3566
Editor:
Association for Computing Machinary, Inc.
DOI:
10.1145/3200201
Autores:
Evangelos Vasilakis, Vassilis Papaefstathiou, Pedro Trancoso, Ioannis Sourdis
Publicado en:
ACM Transactions on Architecture and Code Optimization, Edición 15/4, 2019, Página(s) 1-23, ISSN 1544-3566
Editor:
Association for Computing Machinary, Inc.
DOI:
10.1145/3293447
Autores:
Paul Harvey, Konstantin Bakanov, Ivor Spence, Dimitrios S. Nikolopoulos
Publicado en:
Proceedings of the 6th International Workshop on Runtime and Operating Systems for Supercomputers - ROSS '16, 2016, Página(s) 1-8, ISBN 9781-450343879
Editor:
ACM Press
DOI:
10.1145/2931088.2931090
Autores:
Mavroidis, Iakovos; Papaefstathiou, Ioannis; Lavagno, Luciano; Nikolopoulos, Dimitrios; Koch, Dirk; Goodacre, John; Sourdis, Ioannis; Papaefstathiou, Vassilis; Coppola, Marcello; Palomino, Manuel
Publicado en:
Design, Automation & Test in Europe (DATE) 2016, 2016
Editor:
IEEE
DOI:
10.5281/zenodo.34893
Autores:
Fahad Muslim, Alexandros Demian, Liang Ma, Luciano Lavagno, Affaq Qamar
Publicado en:
Position Papers of the 2016 Federated Conference on Computer Science and Information Systems, 2016, Página(s) 141-145, ISBN 978-83-60810-93-4
Editor:
IEEE
DOI:
10.15439/2016F327
Autores:
Mehdi Roozmeh, Luciano Lavagno
Publicado en:
2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), 2017, Página(s) 1-6, ISBN 978-1-5386-2844-7
Editor:
IEEE
DOI:
10.1109/NORCHIP.2017.8124981
Autores:
Liang Ma, Fahad Bin Muslim, Luciano Lavagno
Publicado en:
2016 European Modelling Symposium (EMS), 2016, Página(s) 157-162, ISBN 978-1-5090-4971-4
Editor:
IEEE
DOI:
10.1109/EMS.2016.036
Autores:
Junnan Shan, Mario R. Casu, Jordi Cortadella, Luciano Lavagno, Mihai T. Lazarescu
Publicado en:
Proceedings of the 56th Annual Design Automation Conference 2019 on - DAC '19, 2019, Página(s) 1-6, ISBN 9781-450367257
Editor:
ACM Press
DOI:
10.1145/3316781.3317821
Autores:
Evangelos Vasilakis, Vassilis Papaefstathiou, Pedro Trancoso, Ioannis Sourdis
Publicado en:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Página(s) 593-596, ISBN 978-3-9819263-0-9
Editor:
IEEE
DOI:
10.23919/date.2018.8342077
Autores:
Anuj Vaishnav, Khoa Dang Pham and Dirk Koch
Publicado en:
28th International Conference on Field Programmable Logic and Application (FPL), 2018
Editor:
FPL
Autores:
Anuj Vaishnav, Khoa Dang Pham, Dirk Koch, James Garside
Publicado en:
2018 28th International Conference on Field Programmable Logic and Applications (FPL), 2018, Página(s) 111-1117, ISBN 978-1-5386-8517-4
Editor:
IEEE
DOI:
10.1109/fpl.2018.00028
Autores:
Khoa Pham, Anuj Vaishnav, Malte Vesper, Dirk Koch
Publicado en:
FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers, Edición 31-31 Aug. 2018, 2018, ISBN 978-3-8007-4723-8
Editor:
VDE
Autores:
Anuj Vaishnav, Khoa Pham, Dirk Koch
Publicado en:
2018 International Conference on Field-Programmable Technology (FPT), 2018, Página(s) 38-45, ISBN 978-1-7281-0214-6
Editor:
IEEE
DOI:
10.1109/fpt.2018.00017
Autores:
Khoa Pham, Edson Horta, Dirk Koch, Anuj Vaishnav, Thomas Kuhn
Publicado en:
2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 2018, Página(s) 36-43, ISBN 978-1-5386-6689-0
Editor:
IEEE
DOI:
10.1109/mcsoc2018.2018.00018
Autores:
Ahsen Ejaz, Vassilios Papaefstathiou, Ioannis Sourdis
Publicado en:
2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2018, Página(s) 1-8, ISBN 978-1-5386-4893-3
Editor:
IEEE
DOI:
10.1109/nocs.2018.8512160
Autores:
Khoa Dang Pham, Malte Vesper, Dirk Koch, Eddie Hung
Publicado en:
2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2019, Página(s) 5-8, ISBN 978-1-7281-1131-5
Editor:
IEEE
DOI:
10.1109/fccm.2019.00011
Autores:
Anuj Vaishnav, Khoa Dang Pham, Dirk Koch
Publicado en:
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies - HEART 2019, 2019, Página(s) 1-6, ISBN 9781-450372558
Editor:
ACM Press
DOI:
10.1145/3337801.3337819
Autores:
Kristiyan Manev, Anuj Vaishnav, Charalampos Kritikakis, Dirk Koch
Publicado en:
Proceedings of the 10th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies - HEART 2019, 2019, Página(s) 1-6, ISBN 9781-450372558
Editor:
ACM Press
DOI:
10.1145/3337801.3337810
Autores:
Evangelos Vasilakis, Vassilis Papaefstathiou, Pedro Trancoso, Ioannis Sourdis
Publicado en:
2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2019, Página(s) 932-942, ISBN 978-1-7281-1246-6
Editor:
IEEE
DOI:
10.1109/ipdps.2019.00101
Autores:
Charalampos Kritikakis, Dirk Koch
Publicado en:
2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019, Página(s) 59-66, ISBN 978-1-7281-1601-3
Editor:
IEEE
DOI:
10.1109/asap.2019.00-29
Autores:
Khoa Dang Pham, Edson Horta, Dirk Koch
Publicado en:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017, Página(s) 894-897, ISBN 978-3-9815370-8-6
Editor:
IEEE
DOI:
10.23919/date.2017.7927114
Autores:
Edson Horta, Xinzi Shen, Khoa Pham, Dirk Koch
Publicado en:
FPGAs for Software Programmers (FSP), 2017, 2017, ISBN 978-3-8007-4443-5
Editor:
IEEE
Autores:
Ejaz, Ahsen
Publicado en:
2018
Editor:
Chalmers
Autores:
Tzilis, Stavros
Publicado en:
2019
Editor:
Chalmers
Autores:
Pavlos Malakonakis, Konstantinos Georgopoulos, Aggelos Ioannou, Luciano Lavagno, Ioannis Papaefstathiou, Iakovos Mavroidis
Publicado en:
Applied Reconfigurable Computing. Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings, Edición 10824, 2018, Página(s) 724-736, ISBN 978-3-319-78889-0
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-78890-6_58
Autores:
Nicolae Bogdan Grigore, Charalampos Kritikakis, Dirk Koch
Publicado en:
Architecture of Computing Systems – ARCS 2018, Edición 10793, 2018, Página(s) 269-282, ISBN 978-3-319-77609-5
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-77610-1_20
Autores:
Konstantinos Georgopoulos, Iakovos Mavroidis, Luciano Lavagno, Ioannis Papaefstathiou, Konstantin Bakanov
Publicado en:
Hardware Accelerators in Data Centers, 2019, Página(s) 199-213, ISBN 978-3-319-92791-6
Editor:
Springer International Publishing
DOI:
10.1007/978-3-319-92792-3_11
Autores:
K. Georgopoulos, K. Bakanov, I. Mavroidis, I. Papaefstathiou, A. Ioannou, P. Malakonakis, K. Pham, D. Koch, L. Lavagno
Publicado en:
Heterogeneous Computing Architectures - Challenges and Vision, 2019, Página(s) 153-189, ISBN 9780-429399602
Editor:
CRC Press
DOI:
10.1201/9780429399602-7
Autores:
Tiffany Trader
Publicado en:
HPCWire, Edición February 24, 2016, 2016
Editor:
HPCWire
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