Objective
We propose to fabricate a chip implementing a neuromorphic architecture that supports state-of-the-art machine
learning algorithms and spike-based learning mechanisms. With respect to its physical architecture this chip will
feature an ultra low power, scalable and highly configurable neural architecture that will deliver a gain of a factor 50x
in power consumption on selected applications compared to conventional digital solutions; and fabricated in Fully-
Depleted Silicon on Insulator (FDSOI) at 28nm design rules. In parallel the project will be validating the modules to
realise RRAM synapses both planar and in a 3D monolithic structure.
We will complete this vision and develop complementary technologies that will allow to address the full spectrum
of applications from mobile/autonomous objects to high performance computing coprocessing, by realising (1) a
technology to implement on-chip learning, using native adaptive characteristics of electronic synaptic elements;
and (2) a scalable platform to interconnect multiple neuromorphic processor chips to build large neural processing
systems.
The neuromorphic computing system will be developed jointly with advanced neural algorithms and computational
architectures for online adaptation, learning, and high-throughput on-line signal
processing, delivering
1. an ultra-low power massively parallel non von Neumann computing platform with non-volatile nano-scale devices
that support on-line learning mechanisms
2. a programming toolbox of algorithms and data structures tailored to the specific constraints and opportunities of the
physical architecture;
3. an array of fundamental application demonstrations instantiating the basic classes of signal processing tasks.
The neural chip will validate the concept and be a first step to develop a European technology platform addressing
from ultra-low power data processing in autonomous systems (Internet of Things) to energy efficient large data
processing in servers and networks.
Fields of science
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringsignal processing
- engineering and technologynanotechnology
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringsensors
- natural sciencescomputer and information sciencesartificial intelligencemachine learning
- natural sciencescomputer and information sciencesdata sciencedata processing
Programme(s)
Funding Scheme
RIA - Research and Innovation action
Coordinator
75015 Paris 15
France
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Participants (9)
3001 Leuven
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5656 AE Eindhoven
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8803 Rueschlikon
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8006 Zurich
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28006 Madrid
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Legal entity other than a subcontractor which is affiliated or legally linked to a participant. The entity carries out work under the conditions laid down in the Grant Agreement, supplies goods or provides services for the action, but did not sign the Grant Agreement. A third party abides by the rules applicable to its related participant under the Grant Agreement with regard to eligibility of costs and control of expenditure.
41004 Sevilla
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00185 Roma
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28725 Bremen
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92120 Montrouge
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