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NEUral computing aRchitectures in Advanced Monolithic 3D-VLSI nano-technologies

Objective

We propose to fabricate a chip implementing a neuromorphic architecture that supports state-of-the-art machine
learning algorithms and spike-based learning mechanisms. With respect to its physical architecture this chip will
feature an ultra low power, scalable and highly configurable neural architecture that will deliver a gain of a factor 50x
in power consumption on selected applications compared to conventional digital solutions; and fabricated in Fully-
Depleted Silicon on Insulator (FDSOI) at 28nm design rules. In parallel the project will be validating the modules to
realise RRAM synapses both planar and in a 3D monolithic structure.
We will complete this vision and develop complementary technologies that will allow to address the full spectrum
of applications from mobile/autonomous objects to high performance computing coprocessing, by realising (1) a
technology to implement on-chip learning, using native adaptive characteristics of electronic synaptic elements;
and (2) a scalable platform to interconnect multiple neuromorphic processor chips to build large neural processing
systems.
The neuromorphic computing system will be developed jointly with advanced neural algorithms and computational
architectures for online adaptation, learning, and high-throughput on-line signal
processing, delivering
1. an ultra-low power massively parallel non von Neumann computing platform with non-volatile nano-scale devices
that support on-line learning mechanisms
2. a programming toolbox of algorithms and data structures tailored to the specific constraints and opportunities of the
physical architecture;
3. an array of fundamental application demonstrations instantiating the basic classes of signal processing tasks.
The neural chip will validate the concept and be a first step to develop a European technology platform addressing
from ultra-low power data processing in autonomous systems (Internet of Things) to energy efficient large data
processing in servers and networks.

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Programme(s)

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Topic(s)

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Funding Scheme

Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.

RIA - Research and Innovation action

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Call for proposal

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(opens in new window) H2020-ICT-2015

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Coordinator

COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Net EU contribution

Net EU financial contribution. The sum of money that the participant receives, deducted by the EU contribution to its linked third party. It considers the distribution of the EU financial contribution between direct beneficiaries of the project and other types of participants, like third-party participants.

€ 1 196 073,75
Address
RUE LEBLANC 25
75015 PARIS 15
France

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Region
Ile-de-France Ile-de-France Paris
Activity type
Research Organisations
Links
Total cost

The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.

€ 1 196 073,75

Participants (9)

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