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NEUral computing aRchitectures in Advanced Monolithic 3D-VLSI nano-technologies

Objective

We propose to fabricate a chip implementing a neuromorphic architecture that supports state-of-the-art machine
learning algorithms and spike-based learning mechanisms. With respect to its physical architecture this chip will
feature an ultra low power, scalable and highly configurable neural architecture that will deliver a gain of a factor 50x
in power consumption on selected applications compared to conventional digital solutions; and fabricated in Fully-
Depleted Silicon on Insulator (FDSOI) at 28nm design rules. In parallel the project will be validating the modules to
realise RRAM synapses both planar and in a 3D monolithic structure.
We will complete this vision and develop complementary technologies that will allow to address the full spectrum
of applications from mobile/autonomous objects to high performance computing coprocessing, by realising (1) a
technology to implement on-chip learning, using native adaptive characteristics of electronic synaptic elements;
and (2) a scalable platform to interconnect multiple neuromorphic processor chips to build large neural processing
systems.
The neuromorphic computing system will be developed jointly with advanced neural algorithms and computational
architectures for online adaptation, learning, and high-throughput on-line signal
processing, delivering
1. an ultra-low power massively parallel non von Neumann computing platform with non-volatile nano-scale devices
that support on-line learning mechanisms
2. a programming toolbox of algorithms and data structures tailored to the specific constraints and opportunities of the
physical architecture;
3. an array of fundamental application demonstrations instantiating the basic classes of signal processing tasks.
The neural chip will validate the concept and be a first step to develop a European technology platform addressing
from ultra-low power data processing in autonomous systems (Internet of Things) to energy efficient large data
processing in servers and networks.

Call for proposal

H2020-ICT-2015
See other projects for this call

Coordinator

COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Address
Rue Leblanc 25
75015 Paris 15
France
Activity type
Research Organisations
EU contribution
€ 1 196 073,75

Participants (8)

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM
Belgium
EU contribution
€ 251 578,75
Address
Kapeldreef 75
3001 Leuven
Activity type
Research Organisations
STICHTING IMEC NEDERLAND
Netherlands
EU contribution
€ 155 000
Address
High Tech Campus 31
5656 AE Eindhoven
Activity type
Research Organisations
IBM RESEARCH GMBH
Switzerland
EU contribution
€ 0
Address
Saeumerstrasse 4
8803 Rueschlikon
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)
UNIVERSITAT ZURICH
Switzerland
EU contribution
€ 0
Address
Ramistrasse 71
8006 Zurich
Activity type
Higher or Secondary Education Establishments
AGENCIA ESTATAL CONSEJO SUPERIOR DE INVESTIGACIONES CIENTIFICAS
Spain
EU contribution
€ 483 220
Address
Calle Serrano 117
28006 Madrid
Activity type
Research Organisations
CONSIGLIO NAZIONALE DELLE RICERCHE
Italy
EU contribution
€ 400 590
Address
Piazzale Aldo Moro 7
00185 Roma
Activity type
Research Organisations
JACOBS UNIVERSITY BREMEN GGMBH
Germany
EU contribution
€ 303 687,50
Address
Campus Ring 1
28759 Bremen
Activity type
Higher or Secondary Education Establishments
STMICROELECTRONICS SA
France
EU contribution
€ 426 000
Address
Boulevard Romain Rolland 29
92120 Montrouge
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)