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Versatile Integrated Accelerator-based Heterogeneous Data Centres

Deliverables

Report on dissemination and communication activities (intermediate)

This deliverable will describe the intermediate dissemination and communication activities.

Final workshop report

Report of the final workshop with the main achievement and the working prototypes of the VINEYARD platform.

Report on dissemination and communication activities (final)

This delivrabel will describe the dissemination and communication activities for the last period.

Executive summary

Executime summary of the VINEYARD platform and the main achievements.

Application requirements and specifications

Theis Deliverable describes the application requirements that will be used for the perfromance evaluation of the VINEYARD platforms. Furthermore, this deliverable describes the specification of the applications that can be hosted in the VINEYARD platform.

Public Project Presentation

Public Website preparation and restisted website preparation for the project managemnt and coordination.

Project stationary

Project stationery

Project website

Creation of the website

Open Access Repository of FPGA accelerators

The accelerators developed for WP3 (D3.4) will be made available through the github of VINEYARD as Open Research Data Pilot.

Publications

Efficient Hardware Acceleration of Recommendation Engines: A Use Case on Collaborative Filtering

Author(s): Konstantinos Katsantonis, Christoforos Kachris, Dimitrios Soudris
Published in: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Issue 10824, 2018, Page(s) 67-78
DOI: 10.1007/978-3-319-78890-6_6

Seamless FPGA Deployment over Spark in Cloud Computing: A Use Case on Machine Learning Hardware Acceleration

Author(s): Christoforos Kachris, Ioannis Stamelos, Elias Koromilas, Dimitrios Soudris
Published in: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Issue 10824, 2018, Page(s) 673-684
DOI: 10.1007/978-3-319-78890-6_54

The VINEYARD Approach: Versatile, Integrated, Accelerator-Based, Heterogeneous Data Centres

Author(s): Christoforos Kachris, Dimitrios Soudris, Georgi Gaydadjiev, Huy-Nam Nguyen, Dimitrios S. Nikolopoulos, Angelos Bilas, Neil Morgan, Christos Strydis, Christos Tsalidis, John Balafas, Ricardo Jimenez-Peris, Alexandre Almeida
Published in: Applied Reconfigurable Computing, 2016, Page(s) 3-13
DOI: 10.1007/978-3-319-30481-6_1

Acceleration of Image Classification with Caffe framework using FPGA

Author(s): Danopoulos, Dimitrios; Kachris, Christoforos; Soudris, Dimitrios
Published in: MOCAST, Issue 1, 2018
DOI: 10.5281/zenodo.1244782

Facilitating Easier Access to FPGAs in the Heterogeneous Cloud Ecosystems

Author(s): Umar Ibrahim Minhas; Roger Woods; Georgios Karakonstantis
Published in: 2018 28th International Conference on Field Programmable Logic and Applications (FPL), Issue 1, 2018
DOI: 10.5281/zenodo.2586983

Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks

Author(s): Umar Ibrahim Minhas; Roger Woods; Georgios Karakonstantis
Published in: ARC 2019, Issue 2, 2019
DOI: 10.5281/zenodo.2586979

Hardware Accelerators for Financial Applications in HDL and High-Level Synthesis

Author(s): Ioannis Stamoulias; Christoforos Kachris; Dimitrios Soudris
Published in: IEEE SAMOS 2017, Issue 1, 2017
DOI: 10.5281/zenodo.836708

SPynq: Acceleration of Machine Learning Applications over Spark on Pynq

Author(s): Christoforos Kachris; Elias Koromilas; Ioannis Stamelos; Dimitrios Soudris
Published in: IEEE SAMOS 2017, Issue 1, 2017
DOI: 10.5281/zenodo.836711

From Knights Corner to Landing: a Case Study Based on a Hodgkin-Huxley Neuron Simulator

Author(s): George Chatzikonstantis; Diego Jiménez; Esteban Meneses; Christos Strydis; Harry Sidiropoulos; Dimitrios Soudris
Published in: ISC 2017, Issue 1, 2017
DOI: 10.5281/zenodo.836676

Spark acceleration on FPGAs: A use case on machine learning in Pynq

Author(s): Koromilas, Elias; Stamelos, Ioannis; KACHRIS, Christoforos; Soudris. Dimitrios
Published in: IEEE MOCAST 2017, Issue 1, 2017
DOI: 10.5281/zenodo.801506

Accelerating Data Center Applications with Reconfigurable DataFlow Engines

Author(s): Barbhuiya, Sakil; Wu, Yun; Murphy, Karen; Vandierendonck, Hans; Karakonstantis, Georgios; Nikolopoulos, Dimitrios
Published in: H2RC 2016, Issue 1, 2016
DOI: 10.5281/zenodo.801522

A survey on reconfigurable accelerators for cloud computing

Author(s): Christoforos Kachris, Dimitrios Soudris
Published in: 2016 26th International Conference on Field Programmable Logic and Applications (FPL), 2016, Page(s) 1-10
DOI: 10.1109/FPL.2016.7577381

Performance and energy evaluation of spark applications on low-power SoCs

Author(s): Ioannis Stamelos, Dimitrios Soudris, Christoforos Kachris
Published in: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), 2016, Page(s) 300-305
DOI: 10.1109/SAMOS.2016.7818362

Performance analysis of accelerated biophysically-meaningful neuron simulations

Author(s): Georgios Smaragdos, Georgios Chatzikostantis, Sofia Nomikou, Dimitrios Rodopoulos, Ioannis Sourdis, Dimitrios Soudris, Chris I. De Zeeuw, Christos Strydis
Published in: 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2016, Page(s) 1-11
DOI: 10.1109/ISPASS.2016.7482069

First impressions from detailed brain model simulations on a Xeon/Xeon-Phi node

Author(s): George Chatzikonstantis, Dimitrios Rodopoulos, Sofia Nomikou, Christos Strydis, Chris I. De Zeeuw, Dimitrios Soudris
Published in: Proceedings of the ACM International Conference on Computing Frontiers - CF '16, 2016, Page(s) 361-364
DOI: 10.1145/2903150.2903477

The VINEYARD project: Versatile integrated accelerator-based heterogeneous data centres

Author(s): Christoforos Kachris, Georgi Gaydadjiev, Huy-Nam Nguyen, Dimitrios S. Nikolopoulos, Angelos Bilas, Neil Morgan, Christos Strydis, Vasilis Spatadakis, Dimitris Gardelis, Ricardo Jimenez-Peris, Alexandre Almeida
Published in: 2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2016, Page(s) 1-4
DOI: 10.1109/MOCAST.2016.7495121

VineTalk: Simplifying Software Access and Sharing of FPGAs in Datacenters

Author(s): Stelios Mavridis; Manolis Pavlidakis; Christi Symeonidou; Christos Kozanitis; Nikolaos Chrysos; Angelos Bilas; Ioannis Stamoulias; Christoforos Kachris; Dimitrios Soudris
Published in: IEEE FPL 2017, Issue 1, 2017
DOI: 10.5281/zenodo.996022

Spynq: FPGA acceleration of Spark applications in a Pynq cluster

Author(s): Christoforos Kachris; Elias Koromilas; Ioannis Stamelos; Dimitrios Soudris
Published in: IEEE FPL 2017, Issue 1, 2017
DOI: 10.5281/zenodo.996016

Algorithmic and memory optimizations on multiple application mapping onto FPGAs

Author(s): Harry Sidiropoulos; Ioannis Koutras; Dimitrios Soudris; Kostas Siozios
Published in: IEEE SAMOS 2017, Issue 1, 2017
DOI: 10.5281/zenodo.998572

FairGV: Fair and Fast GPU Virtualization

Author(s): Cheol-Ho Hong, Ivor Spence, Dimitrios S. Nikolopoulos
Published in: IEEE Transactions on Parallel and Distributed Systems, Issue 28/12, 2017, Page(s) 3472-3485, ISSN 1045-9219
DOI: 10.1109/TPDS.2017.2717908

BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations

Author(s): Georgios Smaragdos, Georgios Chatzikonstantis, Rahul Kukreja, Harry Sidiropoulos, Dimitrios Rodopoulos, Ioannis Sourdis, Zaid Al-Ars, Christoforos Kachris, Dimitrios Soudris, Chris de Zeeuw, Christos Strydis
Published in: Journal of Neural Engineering, 2017, ISSN 1741-2560
DOI: 10.1088/1741-2552/aa7fc5

VINEYARD in the HiPEAC Newsletter info 49

Author(s): Christoforos Kachris
Published in: HiPEAC newsletter, Issue 1, 2017
DOI: 10.5281/zenodo.836721

VINEYARD D8.6 Project website

Author(s): Candela Bravo; Alexander Almeida
Published in: Issue 1, 2016
DOI: 10.5281/zenodo.51479

VINEYARD D1.1 Public Project Presentation

Author(s): Christoforos Kachris; Dimitrios Soudris
Published in: Issue 1, 2016
DOI: 10.5281/zenodo.51477

VINEYARD in the HiPEAC Newsletter info 45

Author(s): Christoforos Kachris
Published in: Issue 1, 2016
DOI: 10.5281/zenodo.836718

D8.3 Data Management Plan (Intermediate version)

Author(s): Candela Bravo; Alexandre Almeida; Christoforos Kachris
Published in: Issue 1, 2016
DOI: 10.5281/zenodo.936394

D5.1: Accelerator Deployment Models

Author(s): Eleni Kanellou; Nikolaos Chrysos; Angelos Bilas; Christoforos Kachris
Published in: Issue 1, 2017
DOI: 10.5281/zenodo.898171

D4.2 Programming Language and Runtime System: Early Prototype (executive Summary)

Author(s): Hans Vandierendonck
Published in: Issue 1, 2017
DOI: 10.5281/zenodo.898167

D2.2: Workload & Traffic Pattern Characterization (Executive Summary)

Author(s): FORTH; NEURASMUS; ICCS; NEUROCOM; ATHEX; LEANXCALE
Published in: Issue 1, 2016
DOI: 10.5281/zenodo.898150

D2.3: System architecture

Author(s): Christoforos Kachris; Angelos Bilas; Nikos Chrysos; Hans Vandierendonck
Published in: Issue 1, 2017
DOI: 10.5281/zenodo.898156

D4.1 Programming Language and Runtime System: Requirements

Author(s): Hans Vandierendonck
Published in: Issue 1, 2016
DOI: 10.5281/zenodo.898163