Energy Efficient FPGA Accelerators for Graph Analytics Applications

Project Information

FPGA Accelerators

Grant agreement ID: 704476

DOI

10.3030/704476

Project closed

EC signature date 14 March 2016

Start date 1 April 2016

End date 31 March 2018

Funded under

• EXCELLENT SCIENCE - Marie Skłodowska-Curie Actions

Total cost

€ 145 845,60

EU contribution

€ 145 845,60

Coordinated by

BILKENT UNIVERSITESI VAKIF
Türkiye

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Links to deliverables and publications from FP7 projects, as well as links to some specific result types such as dataset and software, are dynamically retrieved from OpenAIRE .

Publications

Peer reviewed articles (3)

A Template-Based Design Methodology for Graph-Parallel Hardware Accelerators

Author(s): Andrey Ayupov, Serif Yesil, Muhammet Mustafa Ozdal, Taemin Kim, Steven Burns, Ozcan Ozturk
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Issue 37/2, 2018, Page(s) 420-430, ISSN 0278-0070
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tcad.2017.2706562

Emerging Accelerator Platforms for Data Centers

Author(s): Muhammet Mustafa Ozdal
Published in: IEEE Design & Test, Issue 35/1, 2018, Page(s) 47-54, ISSN 2168-2356
Publisher: IEEE Computer Society
DOI: 10.1109/mdat.2017.2779742

Graph Analytics Accelerators for Cognitive Systems

Author(s): Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, John Greth, Steven Burns, Ozcan Ozturk
Published in: IEEE Micro, Issue 37/1, 2017, Page(s) 42-51, ISSN 0272-1732
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/MM.2017.7