Meeting 100Gbps Ethernet Requirements with CMOS Integrated Circuit Chipset to Dramatically Cut Energy Use in Data Centres

Periodic Reporting for period 2 - MERCURY (Meeting 100Gbps Ethernet Requirements with CMOS Integrated Circuit Chipset to Dramatically Cut Energy Use in Data Centres)

Periodo di rendicontazione: 2017-09-01 al 2019-02-28

HiLight Semi-Conductor Limited is pioneering the use of CMOS to produce a world’s first, very low power 100Gbps Chipset for data centres.

The current state of the art for data transmission within the data centre is inefficient. Optical Transceiver Modules (OTM), at 40Gbps and above, use power-hungry SiGe/BiCMOS technology in their Integrated Circuits. With a typical, large data centre containing at least 800,000 OTMs, they are responsible for around 8% of total energy use.

Demand for energy efficient technology for data centres is of great importance, commercially, environmentally and politically. Investment in European data centres is growing. By 2020, Europe’s data centres will be using 104 Billion kWh energy every year. The EC’s Code of Conduct for Energy Efficiency in Data Centres is designed to help stem this unsustainable situation, without hampering the critical function of data centres. In the near future, data centre energy costs may exceed the cost of their IT. Displacing the use of BiCMOS with CMOS, reduces power consumption and waste heat from data centre technical equipment (simultaneously avoiding cooling).

HiLight Semi-Conductor Limited has developed a disruptive CMOS Chipset that will unlock higher data rates, whilst reducing energy consumption significantly. This low-cost CMOS solution will also help reduce operating costs and enable data centres worldwide to cut energy use, contributing to global climate change targets.

The overall objective of this project is to successfully undertake vital prototyping, validation and demonstration activities to bring MERCURY to market-readiness. Due to the disruptive nature of MERCURY, it is anticipated that a 30% share in the global data centre market can be achieved by 2022, generating €49.5 million cumulative profits and creating 35 very highly skilled jobs, extending Europe’s leadership as a Centre of Excellence in high speed Analog CMOS design.

During the 1st Reporting Period of the project, HiLight have completed the following testing and validating processes:

• Electrical and Optical Evaluations of Receiver MPW silicon
• Analysing and Validating Measurement Results
• ESD Testing

In addition to the completed testing and validation processes, the Life Test Setup was also created and the testing is now underway.

In addition, the work on the Laser driver is nearing completion, with the architecture having been established and confirmed.

Through the work which has been completed during this first year of the project, HiLight have established that the first MPW silicon is operational; from which a collaboration with a potential lead customer has been developed. This collaboration with a lead customer and the agreement to include the HiLight ICs in several of their module builds, has enabled HiLight to begin ‘sub-system’ level evaluation, as a milestone towards a full customer reference design.

HiLight has a unique offering in this field at present and is becoming well placed to exploit the market, due to our technology’s much more advanced stage of development which will ensure we are the first with a ultra low-power commercial product.

Internet data centres are consuming about 3% of the global electricity supply and account for about 2% of total greenhouse gas emissions. Data centres have a similar carbon footprint as the airline industry. It is expected that by 2020 greenhouse gas emissions from data centres will have quadrupled from 2007 levels, because of the increased data usage.

There are several limitations associated with the current state of the art used in this market, which are listed below:

• Uses expensive and lower yield BiCMOS technology
• BiCMOS is a relatively power-hungry technology, requiring typically 2.5 or 3.3 volts compared to approximately 1 volt in CMOS.
• Separate CDRs make the PCB profile too large for customer modules, without populating both sides of the board with components, which adds 50% to PCB production costs.
• Lack of integration increases cost and increases the complexity of wire bonding, further reducing yield.

HiLight Semi-Conductor Ltd is pioneering the use of CMOS to produce a world’s first, very low power 100Gbps Chipset for data centres through this H2020 project “MERCURY”.

Our innovation competes with BiCMOS, achieving high speeds, yet with cost and power savings. Displacing the use of BiCMOS with CMOS, will reduce power consumption and waste heat from data centre technical equipment (simultaneously reducing the need for cooling).

MERCURY is a highly innovative project. HiLight will be the first to use this new CMOS process in the OTM market.
Based on expected energy demand in European data centres, achieving our predicted global market penetration rates will lead to a total energy saving of 1.5 Billion kWh every year in European data centres (6 Billion kWh/year globally), by 2022, because of MERCURY’s ultra-low power CMOS technology.

Modern Data Centre where Hilight very low power 100 Gbps will be used

Periodic Reporting for period 2 - MERCURY (Meeting 100Gbps Ethernet Requirements with CMOS Integrated Circuit Chipset to Dramatically Cut Energy Use in Data Centres)

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