Periodic Reporting for period 1 - CRAM (Crosstalk Analysis for Microchips – a New Market Need)
Berichtszeitraum: 2018-06-01 bis 2018-11-30
Megatrends like 5G, artificial intelligence and cloud computing are driving more complex semiconductor chip design, including the increased use of on-chip signal frequencies past 2 gigahertz (GHz) and complex multiple silicon die in a single package. These increasingly complex designs often lead to electromagnetic crosstalk, when unwanted interference caused by electric and magnetic fields of one signal interferes with another signal. Such crosstalk, when not tackled at the design stage, manifests itself in prototypes and can cost chip manufacturers millions or billions in lost revenues, due both to silicon failure and time-to-market delays.
Right now, there are no other Electronic Design Automation tools in the market capable of detecting crosstalk during the early design stages. Hence, chip designers resort to design practices that suppress inductive effects at significant performance and production cost penalty. Such inefficient design practices often also hinder innovation in chip design.
Helic, using its advanced, patented technology, has launched Pharos™, a game-changing, advanced Crosstalk Analysis tool, which helps engineers analyze and mitigate the risk of on-chip electromagnetic crosstalk also allowing them more freedom to innovate and abandon limiting risk-averse design practices. During the course of the project, several evolutionary paths for Pharos™ have been analysed leading to the conclusion that there is significant market potential for an Automated Crosstalk Analysis tool.
Right now, there are no other Electronic Design Automation tools in the market capable of detecting crosstalk during the early design stages. Hence, chip designers resort to design practices that suppress inductive effects at significant performance and production cost penalty. Such inefficient design practices often also hinder innovation in chip design.
Helic, using its advanced, patented technology, has launched Pharos™, a game-changing, advanced Crosstalk Analysis tool, which helps engineers analyze and mitigate the risk of on-chip electromagnetic crosstalk also allowing them more freedom to innovate and abandon limiting risk-averse design practices. During the course of the project, several evolutionary paths for Pharos™ have been analysed leading to the conclusion that there is significant market potential for an Automated Crosstalk Analysis tool.
During the course of the project, Helic has launched its Electromagnetic Crosstalk Analysis tool, Pharos™. The launch took place in June 2018, during the Design Automation Conference (DAC) and has been disseminated widely through a plethora of publications and marketing channels. Pharos™ has been met with strong market interest and has made its way into field trials within a couple of months after its launch.
In the process of carrying out field-trials, Helic documented customer requirements in the US, Japan, Taiwan, China and Europe. Requirements were analysed and firm strategies have emerged for Pharos™ evolution.
In the process of carrying out field-trials, Helic documented customer requirements in the US, Japan, Taiwan, China and Europe. Requirements were analysed and firm strategies have emerged for Pharos™ evolution.
Current state of the art electromagnetic (EM) modeling tools are either very accurate, but cannot handle the immense complexity of large SoCs, or they cope with complexity by leaving out very important inductance (L) and mutual Inductance (k) effects, thus often producing unreliable results. Helic, with its first version of Pharos™, has moved beyond the state of the art by delivering full RLCk EM modeling at unprecedented levels of speed, accuracy and most importantly capacity - meaning its ability to cope with large, complex SoC designs.
The availability of the proposed tool for Automated Crosstalk Analysis will have significant wider socio-economic impact, since it will reduce the chances of silicon failures, which when they occur, have can strong adverse impact in time-to-market, profit losses, cancellation of projects, loss of market share and ultimately employment force downsizing. Furthermore, the proposed project is expected to significantly improve the reliability of electronic systems, enabling the adoption of key technological innovation in fields with substantial impact on society, such as autonomous driving for the automotive industry and critical medical applications.
The availability of the proposed tool for Automated Crosstalk Analysis will have significant wider socio-economic impact, since it will reduce the chances of silicon failures, which when they occur, have can strong adverse impact in time-to-market, profit losses, cancellation of projects, loss of market share and ultimately employment force downsizing. Furthermore, the proposed project is expected to significantly improve the reliability of electronic systems, enabling the adoption of key technological innovation in fields with substantial impact on society, such as autonomous driving for the automotive industry and critical medical applications.