Designed MMIC’s and packages will be scrutinized from the level of MMIC schematics, layout and simulation performance. The evaluation of simulated performance includes consideration of involved models, small-signal S parameters simulations, Harmonic balance simulations, and EM simulations of passives. The report will include bare-die performance, and a particular focus on the influence from the FOWLP. In this first run the main focus is not on reaching utmost performance of the packaged components, but to understand material system interactions to prepare for high-end performance in the second manufacturing run. The CDR Run 1 will end with the delivery of the stack of GDS files from the design, the different versions and the test patterns as well as the package details. All this material will be documented together with the output from the CDR into a written report This deliverable is also a milestone, M1
Kick-off meeting to inform all partners about management and communication flows in the project.
The communication plan will contain the plan of communication activities, a plan for dissemination of project results and a plan for exploitation of project results and handling of IP rights linked to project outputs
The wafers manufactured using the mask-sets based on MMIC designs from MC2 and CHALMERS will be made available to the partners of the projects. Wafers will be submitted to on-wafer testings and then diced. Some chips will be kept for bare-die characterization and other MMIC’s will be sent to Fraunhofer for packaging. Tracability will be kept between MMICs version and between Run 1 and Run 2 of manufacturing
The data management plan should include information on: *The handling of research data during and after the end of the project *What data will be collected, processed and/or generated *Which methodology & standards will be applied *Whether data will be shared/made open access and *How data will be curated and preserved (including after the end of the project).
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