During the project, the demonstration of analog, non-volatile resistive switching was demonstrated in ferroelectric memristors fabricated with a back-end-of-line compatible process. The temperature during the process does not exceed 400C. The materials, Hf, W, Ti, Zr and O are present in the industry lines, and the processes are easily transferable for large-scale integration. There are two potential impacts: first, the synapses fabricated during FREEMIND can be cointegrated to CMOS neurons for the fabrication of neuromorphic chips. Second, the process, developed in the BRNC clean room, can be upscaled to industrial level.
In direct collaboration with a pre-doctoral researcher from ETH, Mattia Halter. Three-terminals ferroelectric memristors were demonstrated. For the first time, hafnium-zirconate based field-effect transistors were obtained with a Back-End-Of-Line, CMOS compatible process (Halter et al., ACS Appl. Mater. Interfaces 2020, 12, 17725−17732).
A second generation of FeFETs is currently being developed, with a different method for the fabrication of the metal-oxide channel. Larger memory window and retention time are obtained.
The ferroelectric origin of the analog resistive switching in a first generation of two-terminals devices, based on a TiOx interlayer, was demonstrated: a result published in (Begon-Lours et al., Physics Status Solidi, Rapid Research Letters 2020).
Finally, the combination of various experiments brings valuable light on the physical mechanisms explaining the resistive switching in the novel two-terminals devices proposed, and differs from what is commonly seen in ferroelectric tunnel junctions. A manuscript is currently in preparation for the dissemination of such results.