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CORDIS - Résultats de la recherche de l’UE
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Contenu archivé le 2024-04-19

Chip Architecture for Smart Cards and Portable Intelligent Devices

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Les liens vers les livrables et les publications des projets du 7e PC, ainsi que les liens vers certains types de résultats spécifiques tels que les jeux de données et les logiciels, sont récupérés dynamiquement sur OpenAIRE .

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CASCADE has introduced a state-of-the-art 32-bit ARM reduced instruction set computing (RISC) processor architecture with the high performance, low power and small die size ideal for smart cards. It provides the high speed for complex security calculations and compilers are available which produce efficient code from high level programming. The core is powerful enough to run several types of application, opening the way for affordable multi-application cards. CASCADE uses a 32-bit ARM RISC processor core which compared to existing 8-bit designs, provides an increase in processing power by a factor of about 100. Its 32-bit data word capability significantly improves speed in processing complex calculations, providing very efficient processing of cryptographic security algorithms. High level programming language compilers are available for ARM processors, which provide higher efficiency code than the 8-bit systems compilers, again increasing performance. For multi-service cards, the processor has the power to run several applets on top of a virtual machine. The overall architecture has been designed for security, with dedicated protection against physical attack and the operating system allows secure downloading of service provider applications, independently of smart card manufacturers. An algorithm for biometric analysis of voice recognition has been developed, with templates that fit into card memory constraints. The processor can function with supply voltages from 3 V to 5 V, for compatibility with global standard mobile (GSM) equipment or existing banking terminals.

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