Chip Architecture for Smart Cards and Portable Intelligent Devices

Informacje na temat projektu

CASCADE

Identyfikator umowy o grant: 8670

Projekt został zamknięty

Data rozpoczęcia 1 Grudnia 1993

Data zakończenia 30 Listopada 1995

Finansowanie w ramach

• Specific research and technological development programme (EEC) in the field of information technologies, 1990-1994

Koszt całkowity

Brak danych

Wkład UE

Brak danych

Koordynowany przez

GEMPLUS CARD INTERNATIONAL
France

CORDIS oferuje możliwość skorzystania z odnośników do publicznie dostępnych publikacji i rezultatów projektów realizowanych w ramach programów ramowych HORYZONT.

Odnośniki do rezultatów i publikacji związanych z poszczególnymi projektami 7PR, a także odnośniki do niektórych konkretnych kategorii wyników, takich jak zbiory danych i oprogramowanie, są dynamicznie pobierane z systemu OpenAIRE .

Wyniki nadające się do wykorzystania

CASCADE: advanced processors for smart cards

CASCADE has introduced a state-of-the-art 32-bit ARM reduced instruction set computing (RISC) processor architecture with the high performance, low power and small die size ideal for smart cards. It provides the high speed for complex security calculations and compilers are available which produce efficient code from high level programming. The core is powerful enough to run several types of application, opening the way for affordable multi-application cards. CASCADE uses a 32-bit ARM RISC processor core which compared to existing 8-bit designs, provides an increase in processing power by a factor of about 100. Its 32-bit data word capability significantly improves speed in processing complex calculations, providing very efficient processing of cryptographic security algorithms. High level programming language compilers are available for ARM processors, which provide higher efficiency code than the 8-bit systems compilers, again increasing performance. For multi-service cards, the processor has the power to run several applets on top of a virtual machine. The overall architecture has been designed for security, with dedicated protection against physical attack and the operating system allows secure downloading of service provider applications, independently of smart card manufacturers. An algorithm for biometric analysis of voice recognition has been developed, with templates that fit into card memory constraints. The processor can function with supply voltages from 3 V to 5 V, for compatibility with global standard mobile (GSM) equipment or existing banking terminals.