Periodic Reporting for period 2 - MORAL (Export free rad-hard microcontroller for space applications)
Período documentado: 2021-09-01 hasta 2024-01-31
In the past few years, low-cost small satellites have become the focus of researchers. Space agencies have demonstrated their potential for scientific research and practical applications in Earth Observation, Science Mission, Human Spaceflight, Space Transportation, Telecommunications, Navigation, Space Security, Robotic Exploration, Unmanned Aircraft Systems (UAS), Defense Applications, etc. The availability of low-cost small satellites is an important issue for various scientific and commercial projects. The recognized potential for revolutionizing space science, experimentation, and operational use empowers small satellites to be part of a strong business future in space applications. In such a scenario with exponential growth, it is possible to observe that today’s small satellites are mainly powered by traditional electronics, increasing new capabilities but reducing the reliability of such systems compared to traditional missions.
MORAL's objectives align with the future demands of the small satellite market and the huge commercial potential that will be seen by 2025-2030. MORAL aims to change the European space landscape by opening up new business opportunities and offering products that contribute to establishing the European supply chain. In this sense, MORAL is focused on developing a complete, ITAR-free (International Traffic in Arms Regulations), high-performance, 32-bit European microcontroller for space applications, focusing on small satellites, flight control, and payload computers.
These goals have been achieved since the MORAL microcontroller has been functionally demonstrated under radiation environment, and the experimental results showed it is suitable for any space mission orbit and duration, thus reaching TRL6. The developed accompanying software, including the CompCert C compiler with support to the novel PEAKTOP architecture used in the MORAL microcontroller and the small footprint Real-Time Separation Kernel, are also available. However, the outcomes of the MORAL projects are not only restricted to the exploitation of the microcontroller chip but also the separate exploitation of different IPs developed during the project, which include RTL IPs, such as the MIL-STD 1553B interface, radiation-hard 12-bit DAC and 12-bit ADC analog IPs.
MORAL's objectives align with the future demands of the small satellite market and the huge commercial potential that will be seen by 2025-2030. MORAL aims to change the European space landscape by opening up new business opportunities and offering products that contribute to establishing the European supply chain. In this sense, MORAL is focused on developing a complete, ITAR-free (International Traffic in Arms Regulations), high-performance, 32-bit European microcontroller for space applications, focusing on small satellites, flight control, and payload computers.
These goals have been achieved since the MORAL microcontroller has been functionally demonstrated under radiation environment, and the experimental results showed it is suitable for any space mission orbit and duration, thus reaching TRL6. The developed accompanying software, including the CompCert C compiler with support to the novel PEAKTOP architecture used in the MORAL microcontroller and the small footprint Real-Time Separation Kernel, are also available. However, the outcomes of the MORAL projects are not only restricted to the exploitation of the microcontroller chip but also the separate exploitation of different IPs developed during the project, which include RTL IPs, such as the MIL-STD 1553B interface, radiation-hard 12-bit DAC and 12-bit ADC analog IPs.
The MORAL project has achieved excellent technical and non-technical progress over the course of its 49 months. The complete PEAKTOP ISA and corresponding RTL model of the processor were developed and verified in simulation. Performance and capabilities improvements of the base PEAKTOP were carried out by re-designing the MPU and the design of the FPU unit. All planned peripherals were integrated into the processor core, including the PWM generator, Watchdog timer, Pulse counter, CAN 2.0 module, SpaceWire, MIL-STD 1553C, SPI, I2C, and UART interfaces.
The design and verification using modern techniques were initially demonstrated with the PEAKTOP processor and carried on to the MORAL chip design flow. The co-verification, simulation, and testing platform used in MORAL has the advantage of parallel hardware and software design and verification. The reports generated by the platform provide extensive information about the hardware and software behavior, which is further used to identify possible inefficiencies and bottlenecks. Verification and integration tests were executed at every design step, from RTL simulations to post-synthesis, FPGA emulation of the MORAL core and digital peripherals, and, at last, post-layout.
Even though the project's roadmap didn't include the FPGA emulation at first, the decision to have it was of utmost importance for the core verification and the early tests of the ported C-compiler and early RTSK (real-time separation kernel) development for the target PEAKTOP architecture. The compiler development, which includes the binary utilities, was completed, and an extensive debugging phase was conducted. The RTSK targeting a small footprint memory was specified. The preliminary RSTK implementation was tested in the FPGA platform. Later on, the RTSK needs for the target applications were developed and tested in the demonstrator platform.
The project radiation protection relies on high-level methods, such as ECC for memory, HDL coding style for high reliability, and the use of the TMR (triple modular redundancy) approach. The processor core was synthesized targeting The radiation-hard standard-cell library SG13RH. The layout phase of the entire core and other preparations for its fabrication was completed, and the chip was submitted for fabrication. However, other four chips were fabricated during the project: a chip including the SRAM blocks, a chip with the 10-bit DAC that was later upgraded to the final 12-bit version, and a chip with the 12-bit ADC. was developed, manufactured, and passed the tests with packaged chips. The DAC was preliminary tested under Cobalt-60 and successfully demonstrated its robustness to radiation environments.
After the MORAL chips fabrication, they went through the wafer test phase, and the working units were selected for packaging. PCBs for the package tests, stress tests, and demonstrator platform were designed, fabricated, and later assembled. Several test cases were developed for the functional and radiation tests and also for the electrical and performance measurements. Once the packaged chips were available, the stress and life tests were conducted. All tests were completed, and based on the test results, the MORAL microcontroller is suitable for any space mission orbit and duration.
Dissemination activities included creating a preliminary exploitation plan that was later reviewed and extended into the final exploitation plan and a business plan to introduce the MORAL chip into the market. The project website concentrated the relevant information on the project. Along with the website, the project's LinkedIn page and YouTube channel were used for the dissemination activities. After the strong technical development phase that took place it was possible to increase the project dissemination based on the technical results. These include some scientific papers and presentations in important events, such as AMICSA'22 and the European Space Week 2022, as well as the organizing of the workshop called "Fault-tolerant Electronics for Radiation Environments."
The design and verification using modern techniques were initially demonstrated with the PEAKTOP processor and carried on to the MORAL chip design flow. The co-verification, simulation, and testing platform used in MORAL has the advantage of parallel hardware and software design and verification. The reports generated by the platform provide extensive information about the hardware and software behavior, which is further used to identify possible inefficiencies and bottlenecks. Verification and integration tests were executed at every design step, from RTL simulations to post-synthesis, FPGA emulation of the MORAL core and digital peripherals, and, at last, post-layout.
Even though the project's roadmap didn't include the FPGA emulation at first, the decision to have it was of utmost importance for the core verification and the early tests of the ported C-compiler and early RTSK (real-time separation kernel) development for the target PEAKTOP architecture. The compiler development, which includes the binary utilities, was completed, and an extensive debugging phase was conducted. The RTSK targeting a small footprint memory was specified. The preliminary RSTK implementation was tested in the FPGA platform. Later on, the RTSK needs for the target applications were developed and tested in the demonstrator platform.
The project radiation protection relies on high-level methods, such as ECC for memory, HDL coding style for high reliability, and the use of the TMR (triple modular redundancy) approach. The processor core was synthesized targeting The radiation-hard standard-cell library SG13RH. The layout phase of the entire core and other preparations for its fabrication was completed, and the chip was submitted for fabrication. However, other four chips were fabricated during the project: a chip including the SRAM blocks, a chip with the 10-bit DAC that was later upgraded to the final 12-bit version, and a chip with the 12-bit ADC. was developed, manufactured, and passed the tests with packaged chips. The DAC was preliminary tested under Cobalt-60 and successfully demonstrated its robustness to radiation environments.
After the MORAL chips fabrication, they went through the wafer test phase, and the working units were selected for packaging. PCBs for the package tests, stress tests, and demonstrator platform were designed, fabricated, and later assembled. Several test cases were developed for the functional and radiation tests and also for the electrical and performance measurements. Once the packaged chips were available, the stress and life tests were conducted. All tests were completed, and based on the test results, the MORAL microcontroller is suitable for any space mission orbit and duration.
Dissemination activities included creating a preliminary exploitation plan that was later reviewed and extended into the final exploitation plan and a business plan to introduce the MORAL chip into the market. The project website concentrated the relevant information on the project. Along with the website, the project's LinkedIn page and YouTube channel were used for the dissemination activities. After the strong technical development phase that took place it was possible to increase the project dissemination based on the technical results. These include some scientific papers and presentations in important events, such as AMICSA'22 and the European Space Week 2022, as well as the organizing of the workshop called "Fault-tolerant Electronics for Radiation Environments."
MORAL is pushing the State-of-the-Art in terms of fault tolerance, lifetime, and power consumption. It is further developing an ITAR-free RTSK tailored for the microcontroller. All IPs and systems are and will be well-documented and maintainable. In alignment with the H2020 challenge to provide non-dependent access to critical space technologies and to have free, unrestricted access to any required space technology, as well as promoting competitiveness, non-dependence, and innovation, it is planned to offer free licenses of both hardware and software to interested parties, as long as commercial use and profits are not involved. Thus, researchers and innovators will have free access to the MORAL system, and open version of software flow is already available. This project openness enables interested parties to freely develop prototypes and demonstrators of their applications, thus increasing MORAL’s acceptance and visibility. In other words, MORAL brings value and offers a win-win solution, bootstrapping the space market.