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Area-selective Deposition-enabled ultiMAte extensIon of lithogRaphy

Project description

Area selective deposition for advanced nanopatterning

Nanopatterning forms the basis of current and future semiconductor technology. It’s capable of downscaling devices below the 7 nm node, resulting in higher speed, transistor density and computing performance. However, nanopatterning at these dimensions entails many challenges, including extreme ultraviolet lithography photoresists, throughput and process costs, environmental footprint, high complexity and overlay errors. Innovative solutions are therefore needed. The EU-funded ADMAIR project aims to overcome the significant challenges related to extreme ultraviolet materials and processes at the sub-10 nm scale. To do this, it will make use of the bottom-up patterning method known as area selective deposition. This work will promote advances in nanopatterning.

Objective

Nanopatterning is the core of today’s and future semiconductor technology as it drives the downscaling of the devices below the 7 nm node, enabling higher speed, density of transistors and computing performance. In addition, nanofabricated three-dimensional patterned structures are used in devices for photonics, biotechnology and other forms of nanotechnology.[1]Beyond the 10nm node, extreme ultraviolet lithography (EUVL) with a light source of 13.5 nm, will be applied.[2],[3] Associated with nano-patterning at these dimensions, there is a long list of challenges: i) EUVL photoresists (PR) and mask infrastructure and control of the created nanoscale patterns; ii) throughput and process cost; iii) environmental footprint as it is based on litho-etch subtractive processes; iv) high complexity thus decreasing fabrication reliability; v) overlay errors and defectivity. Therefore, innovative solutions are required. Area selective deposition (ASD) offers the potential to relax downstream processing steps by enabling self-aligned processes and bottom-up lithography.
The main goal of this MSCA proposal Area-selective Deposition-enabled ultiMAte extensIon of lithogRaphy (ADMAIR) is to overcome the potentially show-stopping challenges associated with EUV materials and processes at the sub-10nm scale by an additive bottom-up concept. This will be enabled by interdisciplinary joint development projects involving material suppliers and lithography stakeholders, which is a unique advantage of IMEC and will complement the expertise of the candidate in material science and characterization. Ultimately, valuable professional development opportunities for the MSCA candidate and know-how for the host will be achieved.

Coordinator

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM
Net EU contribution
€ 166 320,00
Address
KAPELDREEF 75
3001 Leuven
Belgium

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Region
Vlaams Gewest Prov. Vlaams-Brabant Arr. Leuven
Activity type
Research Organisations
Links
Total cost
€ 166 320,00