So far the following progresses have been made:
1. The proof-of-concept Weighted Spin Torque Nano-Oscillator was designed, fabricated and experimentally verified. A multifunctional MTJ stack was developed. Key performance indicators, such as TMR, yield and oscillation power were tracked and continuously improved on the wafer level.
2. During 1RP, the primary focus was on designing, fabricating, and optimizing primary and novel WSHNOs. In the second period, NanOsc primarily collaborated with other partners, mainly CSIS and POLIMI, to conduct the necessary SHNO characterization for CMOS interface design and pursue the idea of monolithic integration of SHNOs and memristors.
3. We designed STNO front end successfully fabricated and tested. In the second period, AU worked on device characterization (memristors, STNOs and SHNOs) as well as the effect of temperature on such devices together with other partners. Furthermore, AU has been working on the design and implementation of CMOS front-end for controlling the laser, reading out the temperature, and reading out the STNOs.
4. During 1RP, CSIC focused on the initial electrical model of the SHNO proposed by NANOSC, and searched for the best LNA architecture for the application. In 2RP, work has been done on improving the SHNO output impedance and noise models, together with NANOSC, and presenting a new single-to-differential LNA architecture. Finally, CSIC is starting with the design of the CMOS control circuitry of the gold standard 16x16 1T1R neural network SNN.
5. Memristor devices were optimized in combination with SHNOs in terms of forming voltage and current capability. The temperature dependence of the memristor characteristics was studied and compact models were developed for circuit simulations. Memristor arrays with sizes between 8x8 and 16x16 have been developed and the in-memory matrix-vector multiplication (MVM) operation was demonstrated experimentally.
6. During 1RP, the design and processing of VCSELs was the primary focus. The work carried out in the second reporting period was design focused, attempting to find integration solutions that would allow for optical heating to be achieved at a sub-micron scale. In this period on top of extensive simulations, Microles fabrication processes have been studied.
7.Our investigation into terahertz radiation in MTJ stacks revealed that the thickness of the layers hindered signal detection. Moreover, we employed the TRMOKE technique to precisely determine the loss and frequency of the STT-MTJs. We developed a novel experimental setup to investigate the impact of laser-induced heating on device performance. Meanwhile, we conducted THz measurements on various SHNO stacks fabricated by NANOSC and are currently analyzing the results.
