Periodic Reporting for period 1 - TEXTAROSSA (Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale)
Berichtszeitraum: 2021-04-01 bis 2022-09-30
The project is developing core technologies for the emerging generations of high-end heterogeneous computing architectures towards exascale-class systems, extensively applying the top-down co-design process from the applications to the prototypes of HW architectures and SW systems. The ambition is leveraging and further extending the expertise of the core partners involved in the European Processor Initiative (EPI) to realize the EuroHPC roadmap for energy-efficiency, high-performance and secure services by enabling new computation paradigms for HPC, AI and HPDA applications. Several technical goals are pursued: energy efficiency, sustained application performance, fine-tuned thermal policies integrated with an innovative cooling technology, seamless integration of reconfigurable accelerators, development of new IPs. Moreover, two architecturally different, heterogeneous Integrated Development Vehicles (IDVs) will be developed: IDV-A by ATOS focussing on the cooling technology by reusing one existing GPU blade, and IDV-E by E4, featuring ARM and FPGA accelerators.
TEXTAROSSA is fully aligned with the European Vision for Future HPC. HPC is a vital infrastructure for both industry and social actors in Europe. In addition to traditional domains, such as oil & gas, finance, or weather forecasting, HPC is increasingly important for emerging domains such as bioinformatics, medicine, security, and surveillance. Furthermore, the emergence of heterogeneous HW architectures and the trends towards “Green HPC'' have prompted Europe to align its research priorities in HPC along a Strategic Research Agenda (SRA) resulting from wide consultations within the European Technology Platform for HPC (ETP4HPC) and the PRACE initiative.
The overall objectives are strongly innovative and address 5 pillars, from HW innovation to user application: 1) integrated heterogeneous architecture at node level; 2) high-efficiency cooling system at node and system level; 3) innovative tools for seamless integration of reconfigurable accelerators; 4) open integrated development vehicle platforms; and 5) new applications computing domains.
TEXTAROSSA is fully aligned with the European Vision for Future HPC. HPC is a vital infrastructure for both industry and social actors in Europe. In addition to traditional domains, such as oil & gas, finance, or weather forecasting, HPC is increasingly important for emerging domains such as bioinformatics, medicine, security, and surveillance. Furthermore, the emergence of heterogeneous HW architectures and the trends towards “Green HPC'' have prompted Europe to align its research priorities in HPC along a Strategic Research Agenda (SRA) resulting from wide consultations within the European Technology Platform for HPC (ETP4HPC) and the PRACE initiative.
The overall objectives are strongly innovative and address 5 pillars, from HW innovation to user application: 1) integrated heterogeneous architecture at node level; 2) high-efficiency cooling system at node and system level; 3) innovative tools for seamless integration of reconfigurable accelerators; 4) open integrated development vehicle platforms; and 5) new applications computing domains.
TEXTAROSSA addresses the fundamental goals that should be achieved by current exascale computing architectures: energy efficiency, high sustained performance, and programmability. Such goals are pursued by working at the various levels of the computing scenario.
1. At the architectural level: two innovative heterogeneous nodes are being set up, one based on the OpenSequana architecture from Atos (x86 processors accelerated by NVIDIA GPUs) and the other, developed by E4, based on Arm processors and Xilinx FPGAs. To maximize energy efficiency, an innovative two-phase liquid cooling system is being developed and, having been tested and qualified on ad-hoc designed boards with special heating devices, is being installed in both the demonstrator nodes.
2. At the accelerator level: due to the high performance/watt figures of FPGAs, some IPs have been developed: an IP to support variable precision arithmetic (thus reducing memory bandwidth requirements and hardware resources), a cryptographic IP to be used in Homomorphic Encryption (HE) and in Post-Quantum Cryptography (PQC), a communication IP to allow fast intra and inter FPGA communication, an IP to support the scheduling for task-based computational models.
3. At the programming tool level: High-Level Synthesis flows are being widely addressed within the project to allow seamless access to FPGA accelerators. HLS tools are being used in conjunction with stream-based (FastFlow, APEIRON) and task-based (OmpSs, StarPU) tools, and are targeted by tools developed in the project (TAFFO) to support mixed precision arithmetic. Tools are also being developed to support run-time adaptation of the cooling system to the actual needs of the application being run on the node.
4. At the application level: many applications from different relevant domains are being implemented on top of the target architectures to demonstrate the effectiveness of all the solutions being developed within the project.
A co-design approach characterizes the project, with continuous feedback from the users to the architecture/IP/tool developers to better support the development and execution of the various applications.
Dissemination and exploitation of the results is carried out so far are varied and include the identification and specification of the stakeholder groups and of the events that can help us network with them. In the first 18 months of the project, we focused on widening our audience and ensuring the visibility of the TEXTAROSSA project in the international community. Dissemination materials was created, and all activities are support by a public website as well as a landing page on three social media: Facebook, Twitter, and LinkedIn, which are currently updated with news relevant to our audience, including several blog posts aimed at the public. Several international conferences including the collaboration with companion projects were pursued to maximise the spread of TEXTAROSSA achievements.
1. At the architectural level: two innovative heterogeneous nodes are being set up, one based on the OpenSequana architecture from Atos (x86 processors accelerated by NVIDIA GPUs) and the other, developed by E4, based on Arm processors and Xilinx FPGAs. To maximize energy efficiency, an innovative two-phase liquid cooling system is being developed and, having been tested and qualified on ad-hoc designed boards with special heating devices, is being installed in both the demonstrator nodes.
2. At the accelerator level: due to the high performance/watt figures of FPGAs, some IPs have been developed: an IP to support variable precision arithmetic (thus reducing memory bandwidth requirements and hardware resources), a cryptographic IP to be used in Homomorphic Encryption (HE) and in Post-Quantum Cryptography (PQC), a communication IP to allow fast intra and inter FPGA communication, an IP to support the scheduling for task-based computational models.
3. At the programming tool level: High-Level Synthesis flows are being widely addressed within the project to allow seamless access to FPGA accelerators. HLS tools are being used in conjunction with stream-based (FastFlow, APEIRON) and task-based (OmpSs, StarPU) tools, and are targeted by tools developed in the project (TAFFO) to support mixed precision arithmetic. Tools are also being developed to support run-time adaptation of the cooling system to the actual needs of the application being run on the node.
4. At the application level: many applications from different relevant domains are being implemented on top of the target architectures to demonstrate the effectiveness of all the solutions being developed within the project.
A co-design approach characterizes the project, with continuous feedback from the users to the architecture/IP/tool developers to better support the development and execution of the various applications.
Dissemination and exploitation of the results is carried out so far are varied and include the identification and specification of the stakeholder groups and of the events that can help us network with them. In the first 18 months of the project, we focused on widening our audience and ensuring the visibility of the TEXTAROSSA project in the international community. Dissemination materials was created, and all activities are support by a public website as well as a landing page on three social media: Facebook, Twitter, and LinkedIn, which are currently updated with news relevant to our audience, including several blog posts aimed at the public. Several international conferences including the collaboration with companion projects were pursued to maximise the spread of TEXTAROSSA achievements.
TEXTAROSSA is focusing on the development and efficient exploitation of: 1) accelerators and processors including their support of reduced- precision arithmetic, energy efficiency, and efficient orchestration of data assuming more complex and deeper memory and storage hierarchies; 2) both heterogenous platforms and a network of research centers and industries managing the HW and SW IPs for computing and thermal cooling; 3) project results in European initiatives (EPI, CoEs, FET programs); 4) new cooling solutions in the participating companies (ATOS, E4).
The socio-economic impact will be obtained by advancements in the reduction of energy requirements and in the increased performances of applications. Moreover the project will support the advanced experiences of core partners, and mainly of the industrial ones (ATOS, E4, InQuattro) to boost their competitiveness and that of the European HPC ecosystem and aligns the technology know-how of these partners along with the EuroHPC roadmap in terms of energy efficiency, high-performance and secure HPC services.
The socio-economic impact will be obtained by advancements in the reduction of energy requirements and in the increased performances of applications. Moreover the project will support the advanced experiences of core partners, and mainly of the industrial ones (ATOS, E4, InQuattro) to boost their competitiveness and that of the European HPC ecosystem and aligns the technology know-how of these partners along with the EuroHPC roadmap in terms of energy efficiency, high-performance and secure HPC services.