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Abstractions for Safe and Secure HW-SW Systems

Project description

Modular design principles to enable safe and secure hardware-software systems

Many safety critical areas of our lives are controlled by computer systems: from airbag controls in cars and landing gear on airplanes to essential infrastructure such as energy supply and telecommunications. However, a crucial aspect of computer systems, the hardware-software interface, renders the development of safe and secure applications impossible at a fundamental level. This was brought to the fore in 2018, when the Spectre and Meltdown attacks were first described. Ever since, hardware and software developers have been struggling to mitigate the resulting vulnerabilities. The EU-funded SafeSecS project is tackling this challenge with a new framework to guarantee key safety and security features at the software level on top of novel hardware-software contracts.

Objective

Trains, planes, and other safety- and security-critical systems that our society relies on are controlled by computer systems, as is much of our critical infrastructure, including the power grid and cellular networks. But can we trust in the safety and security of these systems?
The starting point of SafeSecS is the observation that today’s hardware-software abstractions, instruction set architectures (ISAs), are fundamentally inadequate for the development of safe or secure systems. Indeed, ISAs abstract from timing, making it impossible to develop safety-critical systems that have to satisfy real-time constraints on top of them. Neither do ISAs provide sufficient security guarantees, making it impossible to develop secure systems on top of them. As a consequence, engineers are forced to rely on brittle timing and security models that are proven wrong time and again, as evidenced e.g. by the recent Spectre attacks; putting our society at risk.

SafeSecS will attack the problem at its root by introducing a framework centered around hardware-software contracts that extend the guarantees provided by ISAs to capture key non-functional properties. Hardware-software contracts formally capture the expectations on correct hardware implementations and they lay the foundation for achieving safety and security guarantees as the software level. Below the hardware-software interface, SafeSecS will contribute modular design principles and tools to construct microarchitectures that provably satisfy a given hardware-software contract. Above the hardware-software interface, SafeSecS will develop rigorous, precise, and scalable techniques to guarantee key safety and security properties at the software level on top of hardware-software contracts. As a whole, SafeSecS will enable the systematic engineering of safe and secure hardware-software systems we can trust in.

Host institution

UNIVERSITAT DES SAARLANDES
Net EU contribution
€ 2 445 125,00
Address
CAMPUS
66123 Saarbrucken
Germany

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Region
Saarland Saarland Regionalverband Saarbrücken
Activity type
Higher or Secondary Education Establishments
Links
Total cost
€ 2 445 125,00

Beneficiaries (1)