Descripción del proyecto
Principios de diseño modular para permitir sistemas de «hardware-software» seguros y protegidos
Muchas áreas de nuestra vida en las que la seguridad es fundamental están controladas por sistemas informáticos: desde los controles de los airbags de los coches y el tren de aterrizaje de los aviones hasta infraestructuras esenciales como las de suministro eléctrico y las de telecomunicaciones. Sin embargo, la interfaz «hardware-software», un aspecto crucial de los sistemas informáticos, hace que el desarrollo de aplicaciones seguras y protegidas sea imposible a un nivel fundamental. Esto quedó de manifiesto en 2018, cuando se describieron por primera vez los ataques de Spectre y Meltdown. Desde entonces, los desarrolladores de «hardware» y «software» se han esforzado por mitigar las vulnerabilidades resultantes. El proyecto SafeSecS, financiado con fondos europeos, aborda este reto con un nuevo marco para garantizar prestaciones clave de seguridad y protección a nivel de «software» además de con contratos nuevos de «hardware-software».
Objetivo
Trains, planes, and other safety- and security-critical systems that our society relies on are controlled by computer systems, as is much of our critical infrastructure, including the power grid and cellular networks. But can we trust in the safety and security of these systems?
The starting point of SafeSecS is the observation that today’s hardware-software abstractions, instruction set architectures (ISAs), are fundamentally inadequate for the development of safe or secure systems. Indeed, ISAs abstract from timing, making it impossible to develop safety-critical systems that have to satisfy real-time constraints on top of them. Neither do ISAs provide sufficient security guarantees, making it impossible to develop secure systems on top of them. As a consequence, engineers are forced to rely on brittle timing and security models that are proven wrong time and again, as evidenced e.g. by the recent Spectre attacks; putting our society at risk.
SafeSecS will attack the problem at its root by introducing a framework centered around hardware-software contracts that extend the guarantees provided by ISAs to capture key non-functional properties. Hardware-software contracts formally capture the expectations on correct hardware implementations and they lay the foundation for achieving safety and security guarantees as the software level. Below the hardware-software interface, SafeSecS will contribute modular design principles and tools to construct microarchitectures that provably satisfy a given hardware-software contract. Above the hardware-software interface, SafeSecS will develop rigorous, precise, and scalable techniques to guarantee key safety and security properties at the software level on top of hardware-software contracts. As a whole, SafeSecS will enable the systematic engineering of safe and secure hardware-software systems we can trust in.
Ámbito científico
- natural sciencescomputer and information sciencessoftware
- engineering and technologyelectrical engineering, electronic engineering, information engineeringinformation engineering
- natural sciencescomputer and information sciencescomputer securitymalicious software
- natural sciencescomputer and information sciencescomputer securitydata protection
- natural sciencescomputer and information sciencescomputer securitynetwork security
Programa(s)
Régimen de financiación
ERC-ADG - Advanced GrantInstitución de acogida
66123 Saarbrucken
Alemania