Descrizione del progetto
I principi della progettazione modulare per abilitare sistemi hardware-software sicuri e protetti
Molte aree critiche per la sicurezza della nostra vita sono controllate da sistemi informatici: dai controlli degli airbag nelle automobili e dai carrelli di atterraggio sugli aerei alle infrastrutture essenziali come la fornitura di energia e le telecomunicazioni. Tuttavia un aspetto cruciale dei sistemi informatici, l’interfaccia hardware-software, rende impossibile lo sviluppo di applicazioni fondamentalmente sicure. Il problema è emerso nel 2018, quando sono stati descritti per la prima volta gli attacchi Spectre e Meltdown. Da allora, gli sviluppatori di hardware e software stanno lottando per mitigare le vulnerabilità emerse. Il progetto SafeSecS, finanziato dall’UE, sta affrontando questa sfida con un nuovo quadro per garantire caratteristiche basilari di sicurezza e protezione a livello di software su nuovi contratti hardware-software.
Obiettivo
Trains, planes, and other safety- and security-critical systems that our society relies on are controlled by computer systems, as is much of our critical infrastructure, including the power grid and cellular networks. But can we trust in the safety and security of these systems?
The starting point of SafeSecS is the observation that today’s hardware-software abstractions, instruction set architectures (ISAs), are fundamentally inadequate for the development of safe or secure systems. Indeed, ISAs abstract from timing, making it impossible to develop safety-critical systems that have to satisfy real-time constraints on top of them. Neither do ISAs provide sufficient security guarantees, making it impossible to develop secure systems on top of them. As a consequence, engineers are forced to rely on brittle timing and security models that are proven wrong time and again, as evidenced e.g. by the recent Spectre attacks; putting our society at risk.
SafeSecS will attack the problem at its root by introducing a framework centered around hardware-software contracts that extend the guarantees provided by ISAs to capture key non-functional properties. Hardware-software contracts formally capture the expectations on correct hardware implementations and they lay the foundation for achieving safety and security guarantees as the software level. Below the hardware-software interface, SafeSecS will contribute modular design principles and tools to construct microarchitectures that provably satisfy a given hardware-software contract. Above the hardware-software interface, SafeSecS will develop rigorous, precise, and scalable techniques to guarantee key safety and security properties at the software level on top of hardware-software contracts. As a whole, SafeSecS will enable the systematic engineering of safe and secure hardware-software systems we can trust in.
Campo scientifico
- natural sciencescomputer and information sciencessoftware
- engineering and technologyelectrical engineering, electronic engineering, information engineeringinformation engineering
- natural sciencescomputer and information sciencescomputer securitymalicious software
- natural sciencescomputer and information sciencescomputer securitydata protection
- natural sciencescomputer and information sciencescomputer securitynetwork security
Programma(i)
Argomento(i)
Meccanismo di finanziamento
ERC-ADG - Advanced GrantIstituzione ospitante
66123 Saarbrucken
Germania