CORDIS - Forschungsergebnisse der EU
CORDIS

Abstractions for Safe and Secure HW-SW Systems

Projektbeschreibung

Modulare Designprinzipien für sichere Hardware-Software-Systeme

Viele sicherheitskritische Bereiche unseres Alltags werden von Computersystemen gesteuert – seien es Airbag-Steuerungen in Fahrzeugen, Flugzeugfahrwerke oder auch grundlegende Infrastrukturen wie die Energieversorgung und Telekommunikation. Ein zentraler Aspekt solcher Computersysteme – die Hardware-Software-Schnittstelle – macht die Entwicklung von sicheren Anwendungen jedoch grundsätzlich unmöglich. Das wurde 2018 sehr deutlich, als erstmals Spectre- und Meltdown-Angriffe beobachtet wurden. Seither kämpft die Hardware- und Softwareentwicklung damit, die entsprechenden Schwachstellen zu minimieren. Das EU-finanzierte Projekt SafeSecS geht dieses Problem durch die Schaffung eines neuen Rahmens an, der wesentliche Sicherheitsmerkmale auf der Softwareebene zusätzlich zu neuen Hardware-Software-Verträgen garantieren soll.

Ziel

Trains, planes, and other safety- and security-critical systems that our society relies on are controlled by computer systems, as is much of our critical infrastructure, including the power grid and cellular networks. But can we trust in the safety and security of these systems?
The starting point of SafeSecS is the observation that today’s hardware-software abstractions, instruction set architectures (ISAs), are fundamentally inadequate for the development of safe or secure systems. Indeed, ISAs abstract from timing, making it impossible to develop safety-critical systems that have to satisfy real-time constraints on top of them. Neither do ISAs provide sufficient security guarantees, making it impossible to develop secure systems on top of them. As a consequence, engineers are forced to rely on brittle timing and security models that are proven wrong time and again, as evidenced e.g. by the recent Spectre attacks; putting our society at risk.

SafeSecS will attack the problem at its root by introducing a framework centered around hardware-software contracts that extend the guarantees provided by ISAs to capture key non-functional properties. Hardware-software contracts formally capture the expectations on correct hardware implementations and they lay the foundation for achieving safety and security guarantees as the software level. Below the hardware-software interface, SafeSecS will contribute modular design principles and tools to construct microarchitectures that provably satisfy a given hardware-software contract. Above the hardware-software interface, SafeSecS will develop rigorous, precise, and scalable techniques to guarantee key safety and security properties at the software level on top of hardware-software contracts. As a whole, SafeSecS will enable the systematic engineering of safe and secure hardware-software systems we can trust in.

Finanzierungsplan

ERC-ADG - Advanced Grant

Gastgebende Einrichtung

UNIVERSITAT DES SAARLANDES
Netto-EU-Beitrag
€ 2 445 125,00
Adresse
CAMPUS
66123 Saarbrucken
Deutschland

Auf der Karte ansehen

Region
Saarland Saarland Regionalverband Saarbrücken
Aktivitätstyp
Higher or Secondary Education Establishments
Links
Gesamtkosten
€ 2 445 125,00

Begünstigte (1)