Periodic Reporting for period 1 - HiPE (High Performance Power Electronics Integrations)
Periodo di rendicontazione: 2022-11-01 al 2024-04-30
The project outputs will include:
a scalable and modular family of WBG-based traction inverters with significantly improved specific cooling performance, suitable for 400V, 800V and 1200V applications, with power ratings from 50 to 250 kW, integrated into electric drives including the high-to-low voltage (HV/LV) DC/DC converters, thus enabling drastic size and weight reductions; a family of integrated WBG-based bidirectional on-board chargers (OBCs) and HV/LV DC/DC converters, with optimized innovative topologies, including use of Gallium Nitride (GaN) integrated, fault-tolerant and cost-effective GaN-based power electronics for high-voltage ancillaries and chassis actuators.
The development of these outputs will imply significant research and innovation in terms of circuit topologies, electro-magnetic interference filters, integrated double-side pin-fin and immersion/impingement/two-phase cooling, stray inductance reduction, DC-link capacitors, materials, manufacturing techniques, as well as intelligent model-based and data-driven control, achieved through simulation and optimization methodologies. The result will be an unprecedented level of functional integration, e.g. the HiPE smart power electronics solutions will include intelligent and predictive controllers to optimize performance, innovative and computationally efficient data-driven approaches to monitor the state-of-health of the relevant hardware, as well as novel self-adaptive digital-twin-based methodologies to tailor the component- and vehicle-level algorithms to the specific condition of the hardware installed on each individual BEV, and actively improve reliability and availability of the electronic parts during field use.
The experiments on demonstrators and several test rigs will highlight increased values of power density, specific power and energy efficiency with respect to the state-of-the-art (SotA) of silicon (Si-)based and WBG-based power electronics, meeting and significantly exceeding the expectations of the Horizon Europe Call CL5-2021-D5-01-02 topic. Such advancements will be achieved while preserving the expected automotive quality level without having to recur to overengineering, thanks to the innovative implementation of data-driven dependability techniques for smart systems. The extensive simulation analyses running in parallel with the design and experimental activities will further demonstrate the scalability, modularity and wider potential impact of the HiPE power electronics solutions.
The work through the digital twin is oriented to the creation of a model that can be used to analyse the performance of a BEV.
This task explores this methodology focusing on the creation of a scalable and configurable model able to adapt to the wide range of BEVs segment that has been chosen as target. In particular, the partners of the project design and implement models related to power electronics architecture using a dedicated simulation software. The models include traction inverter, electric motor, on-board charger, DCDC converters, chassis actuators, power electronic auxiliaries and associated controls. All these models have agreed interfaces in order to allow the creation of a system model linking together the specialised ones.
The aim is to demonstrate at simulation level the improvement on the efficiency that can be obtained in the automotive sector switching to this new semiconductor technology. In particular, the focus of the work is on considering of the dynamic response relevant to the NVH and drivability aspects at BEVs level.
The proximity of the gate driver to the power device is important to enable clean switching signals that will help improve the overall system efficiency and reduce EMI. Architectures have been analyzed that minimise the track distance between the gate driver outputs and the gate signal input pins on the power modules. The installation and best integration in the inverter focuses on the lowest losses regarding switching frequency. Therefore, the closest and most optimised relative placement of both components was selected to keep parasitic parameters under control. In parallel, a critical technical review, cost assessment and requirement analysis for integrated next-generation driver component with the power module is carried out for the four HiPE Use Cases
The basic methodology on determining retail prices, the total cost of ownership (TCO) and the cost-benefit analysis/cost-effectiveness analysis (CBA/CEA) as to be applied in the project has been outlined. HiPE strives for a manageable and traceable way to determine the corresponding cost of the HiPE use cases.
For the reduction of size and weight of PE components Semiconductor cooling and thermal management as essential prerequisite for downsizing was investigated and reported.
1. new PE architectures allowing weight and size reduction, while avoiding EMI issues
2. new cooling of PE architectures allowing size and weight reduction
3. digital twins: allowing predictive maintenance and predictive control