Periodic Reporting for period 2 - MatEl (PZT and Graphene MATerials innovations for advanced opto-Electronic applications in AR and biosensing)
Berichtszeitraum: 2024-07-01 bis 2025-06-30
Europe’s leadership in photonics and electronics depends on meeting the demands of next-generation optoelectronic devices, high performance, multi-functionality, and cost efficiency in a compact footprint. Achieving this requires new on-chip integration schemes. Among key platforms, silicon nitride (Si₃N₄) offers broad spectral coverage and low losses, but lacks intrinsic active properties, making integration of active materials essential. However, incorporating III-V and II-VI semiconductors on Si₃N₄ remains complex and costly.
The EU-funded MatEl project introduces an innovative on-chip integration approach, enabling precise, rapid alignment and bonding of various chip packages onto Si₃N₄. By combining laser transfer (LIFT) and laser soldering, MatEl aims to accelerate industrial uptake of hybrid optoelectronic integrated circuits (OEICs), delivering high performance and versatility at reduced cost and size. This approach is further strengthened by the monolithic integration of advanced materials—graphene and high-quality PZT—and will be demonstrated in two next-generation devices at TRL5:
• AR display featuring a 2D light source for light-field with on-chip RGB lasers and OEIC-based demultiplexer.
• Bio-photonic sensors for reliable and low-cost detection of Covid-19 featuring integrated on-chip VCSEL at 850 nm and Graphene-based photodetector.
The overall goal of MatEl will be achieved by consistently pursuing the following objectives:
Objective 1. Wafer–scale integration of high-quality and defect-free advanced materials.
Objective 2. To develop a novel Si3N4 wafer platform featuring etched pockets compatible with heterogeneous active components (III-V, II-V chips and electronic chips).
Objective 3. To introduce the first fully digital, laser-based approach for the bonding of heterogeneous active components on – chip, within predesignated etched pockets.
Objective 4. To Design and develop a generic housing for hybrid OEICs with different functionalities.
Objective 5. To demonstrate and validate at TRL5 advanced OEICs for two applications.
The EU-funded MatEl project introduces an innovative on-chip integration approach, enabling precise, rapid alignment and bonding of various chip packages onto Si₃N₄. By combining laser transfer (LIFT) and laser soldering, MatEl aims to accelerate industrial uptake of hybrid optoelectronic integrated circuits (OEICs), delivering high performance and versatility at reduced cost and size. This approach is further strengthened by the monolithic integration of advanced materials—graphene and high-quality PZT—and will be demonstrated in two next-generation devices at TRL5:
• AR display featuring a 2D light source for light-field with on-chip RGB lasers and OEIC-based demultiplexer.
• Bio-photonic sensors for reliable and low-cost detection of Covid-19 featuring integrated on-chip VCSEL at 850 nm and Graphene-based photodetector.
The overall goal of MatEl will be achieved by consistently pursuing the following objectives:
Objective 1. Wafer–scale integration of high-quality and defect-free advanced materials.
Objective 2. To develop a novel Si3N4 wafer platform featuring etched pockets compatible with heterogeneous active components (III-V, II-V chips and electronic chips).
Objective 3. To introduce the first fully digital, laser-based approach for the bonding of heterogeneous active components on – chip, within predesignated etched pockets.
Objective 4. To Design and develop a generic housing for hybrid OEICs with different functionalities.
Objective 5. To demonstrate and validate at TRL5 advanced OEICs for two applications.
Within the current reporting period (RP2), the main achievements are:
Objective 1. Wafer-scale integration of high-quality and defect-free advanced materials
BSotA: Demultiplexing frequencies for the light-field AR display (“10 kHz version” with PZT) were defined as a binary series from 80 to 1280 Hz. A “short-loop” chip meeting phase shift specs (D3.2) was completed. The “GHz version” will use electro-mechanical resonance via a surface acoustic wave in the cladding oxide, targeting ~150 MHz; FEM simulations and design are finalized. Graphene-based donor substrates for LIFT were manufactured, with details reported in D3.5 (M24).
Objective 2. To develop a novel Si3N4 wafer platform featuring etched pockets compatible with heterogeneous active components (III-V, II-V chips and electronic chips)
BSotA: The first-generation Si₃N₄ chips for the light-field AR display and Graphene PD shortloop have been completed. All chip designs for the display platform have been tested, characterized, and reported. This data is now feeding the design of the second-generation demonstrator. Graphene PD shortloop chips are currently under testing, incorporating feedback from the consortium.
Objective 3. To introduce the first fully digital, laser-based approach for the bonding of heterogeneous active components on-chip, within predesigned etched pockets
BSotA: The LIFT process for solder materials was fully optimized, including laser fluence and pulse count, ensuring consistent printing and alignment (D4.1). A custom assembly station for laser soldering of opto-electronic components was developed (D4.3a) comprising a custom pick-and-place module, flip-chip unit, and split optics alignment. Laser soldering parameters were defined and reported in D4.4.
Objective 4. To Design and develop a generic housing for hybrid OEICs with different functionalities
BSotA: For the demonstrator AR display, the commercial housing was replaced by a custom mechanical stack. This allows integration of a substrate for both electrical signal distribution and mechanical support.
Objective 5. To demonstrate and validate at TRL5 advanced OEICs for two applications
BSotA: For the light-field AR display, key aspects were optimized to reduce power consumption (via PZT actuator architecture) and lower output coupler manufacturing costs by exploring 3D nanoprinting. Form factor and performance were improved by integrating electronics on separate PCBs instead of the TriPleX PIC. Final design/layout is in progress. For the photonic biosensors, a chip integrating VCSEL, NTC, and photodiodes will be developed for the readout unit. By M30, the packaging solution and assembly process for the biosensor demonstrator PIC are well established.
Objective 1. Wafer-scale integration of high-quality and defect-free advanced materials
BSotA: Demultiplexing frequencies for the light-field AR display (“10 kHz version” with PZT) were defined as a binary series from 80 to 1280 Hz. A “short-loop” chip meeting phase shift specs (D3.2) was completed. The “GHz version” will use electro-mechanical resonance via a surface acoustic wave in the cladding oxide, targeting ~150 MHz; FEM simulations and design are finalized. Graphene-based donor substrates for LIFT were manufactured, with details reported in D3.5 (M24).
Objective 2. To develop a novel Si3N4 wafer platform featuring etched pockets compatible with heterogeneous active components (III-V, II-V chips and electronic chips)
BSotA: The first-generation Si₃N₄ chips for the light-field AR display and Graphene PD shortloop have been completed. All chip designs for the display platform have been tested, characterized, and reported. This data is now feeding the design of the second-generation demonstrator. Graphene PD shortloop chips are currently under testing, incorporating feedback from the consortium.
Objective 3. To introduce the first fully digital, laser-based approach for the bonding of heterogeneous active components on-chip, within predesigned etched pockets
BSotA: The LIFT process for solder materials was fully optimized, including laser fluence and pulse count, ensuring consistent printing and alignment (D4.1). A custom assembly station for laser soldering of opto-electronic components was developed (D4.3a) comprising a custom pick-and-place module, flip-chip unit, and split optics alignment. Laser soldering parameters were defined and reported in D4.4.
Objective 4. To Design and develop a generic housing for hybrid OEICs with different functionalities
BSotA: For the demonstrator AR display, the commercial housing was replaced by a custom mechanical stack. This allows integration of a substrate for both electrical signal distribution and mechanical support.
Objective 5. To demonstrate and validate at TRL5 advanced OEICs for two applications
BSotA: For the light-field AR display, key aspects were optimized to reduce power consumption (via PZT actuator architecture) and lower output coupler manufacturing costs by exploring 3D nanoprinting. Form factor and performance were improved by integrating electronics on separate PCBs instead of the TriPleX PIC. Final design/layout is in progress. For the photonic biosensors, a chip integrating VCSEL, NTC, and photodiodes will be developed for the readout unit. By M30, the packaging solution and assembly process for the biosensor demonstrator PIC are well established.
MatEl introduces a novel, on-chip integration scheme enabling accurate and fast alignment and bonding of any type of chip package on Si3N4, demonstrated in two selected next-gen devices at TRL5:
• Augmented Reality (AR) display featuring a 2D light source for light-field with on-chip RGB lasers and OEIC-based demultiplexer, and
• Bio-photonic sensors for reliable and low-cost detection of Covid-19 featuring integrated on-chip VCSEL at 850 nm and photodetector.
The MatEl consortium has identified an exploitation plan focused on translating these advancements into commercial success, reinforcing collaborations, and enhancing EU industrial capabilities.
Exploitable Results (ERs) have been identified, such as LIFT process and Laser soldering optimisation, assembly and packaging processes of electronic and photonic integrated components, high-quality material development (monolayer graphene, PZT thin films), demonstration of the use of graphene as a photodetector on hybrid biosensor PICs, and in a light-field display technology for AR.
These operate in specific markets. While the materials market, especially for graphene, is still in the R&D phase, it offers significant development opportunities but requires further investment. In contrast, OEIC design, manufacturing, and integration are more mature, and the MatEl project focuses on optimizing these through cost-effective processes. Regarding IP, MatEl partners plan to secure patents, trademarks, know-how, copyrights, and design rights for foreground knowledge developed during the project. IP landscape analysis confirms no third-party IP currently threatens the exploitation of MatEl results or limits partners' Freedom to Operate. Existing consortium-owned patents and partner leadership suggest this will remain stable throughout the project.
• Augmented Reality (AR) display featuring a 2D light source for light-field with on-chip RGB lasers and OEIC-based demultiplexer, and
• Bio-photonic sensors for reliable and low-cost detection of Covid-19 featuring integrated on-chip VCSEL at 850 nm and photodetector.
The MatEl consortium has identified an exploitation plan focused on translating these advancements into commercial success, reinforcing collaborations, and enhancing EU industrial capabilities.
Exploitable Results (ERs) have been identified, such as LIFT process and Laser soldering optimisation, assembly and packaging processes of electronic and photonic integrated components, high-quality material development (monolayer graphene, PZT thin films), demonstration of the use of graphene as a photodetector on hybrid biosensor PICs, and in a light-field display technology for AR.
These operate in specific markets. While the materials market, especially for graphene, is still in the R&D phase, it offers significant development opportunities but requires further investment. In contrast, OEIC design, manufacturing, and integration are more mature, and the MatEl project focuses on optimizing these through cost-effective processes. Regarding IP, MatEl partners plan to secure patents, trademarks, know-how, copyrights, and design rights for foreground knowledge developed during the project. IP landscape analysis confirms no third-party IP currently threatens the exploitation of MatEl results or limits partners' Freedom to Operate. Existing consortium-owned patents and partner leadership suggest this will remain stable throughout the project.