Periodic Reporting for period 2 - 14ACMOS (14 Anstrom CMOS IC technology)
Reporting period: 2023-12-01 to 2024-11-30
The 14ACMOS project enables the IC industry to migrate to the next technology node. The project is to explore and realize solutions for the manufacture of 14 Angstrom CMOS chip technology, addressing: Lithography, Metrology, Mask Infrastructure and Process technology.
The project will support the partners and their supplier networks to stay at the leading edge of high-tech developments, crucial to meet the digitization challenges of the European society. In regard to:
Scientific: Demonstrate a cost-efficient solution for 14A technology node, shifting the technological boundaries and understanding of new 14A technology nodes, including lithography, 3D metrology, characterization, masks equipment, design and process technology
Economic: Boost industrial competitiveness in the EU, stimulating job growth in a broad ecosystem consisting of large industrial and SME, OEMs, joint development partners and suppliers as well as knowledge institutes to continue the developments of new processes and modules for advanced nodes technologies. 14ACMOS will generate new partnerships, businesses and create new jobs, and attract talents in Europe.
Societal: Enabling new application in areas such as security, communication and enabling of further automation in mobility, health and research. With respect to sustainability, 14ACMOS will develop more sustainable material and processing alternatives in addition to a reduced carbon footprint of the EUV-chips.
The project will support the partners and their supplier networks to stay at the leading edge of high-tech developments, crucial to meet the digitization challenges of the European society. In regard to:
Scientific: Demonstrate a cost-efficient solution for 14A technology node, shifting the technological boundaries and understanding of new 14A technology nodes, including lithography, 3D metrology, characterization, masks equipment, design and process technology
Economic: Boost industrial competitiveness in the EU, stimulating job growth in a broad ecosystem consisting of large industrial and SME, OEMs, joint development partners and suppliers as well as knowledge institutes to continue the developments of new processes and modules for advanced nodes technologies. 14ACMOS will generate new partnerships, businesses and create new jobs, and attract talents in Europe.
Societal: Enabling new application in areas such as security, communication and enabling of further automation in mobility, health and research. With respect to sustainability, 14ACMOS will develop more sustainable material and processing alternatives in addition to a reduced carbon footprint of the EUV-chips.
In lithography, the framework to manage dynamics of the projection optics and the scanner to enable improved overlay at higher source powers and accelerations has been developed. Implementation is ongoing towards a first POB to be delivered to ASML by second half of this year.
To improve energy efficiency, the main activity is to enable the system to use cooling water of 32 °C instead of 20 °C. In this period, most of the risks have been investigated and addressed without finding any showstoppers. Secondly, good progress has been made to improve the internal gas flows to improve heat transfer and cooling efficiency. Thirdly, work has started on new amplifier boards for increasing power efficiency and reliability.
For characterization of the EUV scanner conditions, a time-resolved spectrometer has been designed, integrated and is being calibrated. A commercial full-scale plasma model has been acquired by ASML and has been validated for scanner conditions. For diagnostics, work is ongoing on a modified tool to measure ion energies and fluxes, even within the EUV beam itself; also, work is ongoing on an improved Residual Gas Analyzer.
In Metrology, for an in depth characterization of the dummy gate patterning for CFET devices, imec has prepared two wafers, etched with different dummy gate etch processes, for an extended characterization by the metrology partners and will be distributed to the metrology companies (NOVA, AMIL and NFI) during the 3rd period.
BRT concluded with the assessment of a novel laser-based X-ray source and decided to halt the development and instead focus on low energy X-ray fluorescence and reflectivity with in-house X-ray sources. PTB was in continuous exchange with BRT to find the best energy region for the analysis of thin films and nanostructured surfaces.
EXC in collaboration with BRT have reported initial results on thin TiN, using a prototype source and a standard polycapillary lens. The intensity gain is more than 2x compared to the SotA setup.
AMIL completed the integration of the new SEM review column to the system on E-beam metrology and inspection platform with improved imaging and throughput.
PRODRIVE defined next-gen image processing based on benchmarking of various next-gen metrology and inspection systems architectures.
PI have been developed novel stage for AMIL inspection tool and proposed a new piezo motor technology including a novel kinematic approach and sensor concept.
NOVA developed and tested the Next Generation of Spectral Interferometry [NGSI] channel successfully.
NFI developed probe based metrology algorithms to increase resolution and throughput and has accurately retain surface roughness information along the top surfaces, edges, and inclined walls of 3D structures.
KLA developed machine leaning base overlay for improved total measurements uncertainties.
Imec coordinated the first development of novel and refined metrology techniques for the assessment of EUV reticle degradation and produced a samples plan with partners with TNO, UPB and PTB.
In mask infrastructure, the automation of the ZEISS particle removal tool has been improved and the new manipulator stage has been deployed to all ZEISS PRT systems. Significant progress has been made improving reliability of the PRT (see Figure 4.1). UPB demonstrated the successful mounting and TEM analysis including EDX of AFM tips for particle removal (see Figure 4.2).
TNO is set to investigate key parameters for optimizing mask-level conditions. Sample preparation for this is ongoing.
On Process Technology, related to “Patterning solutions”, progress comprises the selection of resists for hNA 0.55NA EUV lithography, including the demonstration of first exposures on an hNA EUV scanner and this for both wet and dry resist technology (Figure 5.1).
Regarding “Device selection”, key results include the completion of process developments, culminating in the demonstration of electrical functional uni-channel CFET devices (Figure 5.2).
Related to “Performant MOL and BEOL” process development optimization yielded an electrical more mature Vertical-Horizontal-Vertical (VHV) scaling booster (Figure 5.3). Applying ion-beam etching (IBE), thin film binary compound interconnects (Figure 5.4) were successfully patterned. PLD (pulsed layer deposition) hardware was upgraded for depositions >550C; perovskite phase ‘only’ BiFeO3 deposition was demonstrated (Figure 5.5).
To improve energy efficiency, the main activity is to enable the system to use cooling water of 32 °C instead of 20 °C. In this period, most of the risks have been investigated and addressed without finding any showstoppers. Secondly, good progress has been made to improve the internal gas flows to improve heat transfer and cooling efficiency. Thirdly, work has started on new amplifier boards for increasing power efficiency and reliability.
For characterization of the EUV scanner conditions, a time-resolved spectrometer has been designed, integrated and is being calibrated. A commercial full-scale plasma model has been acquired by ASML and has been validated for scanner conditions. For diagnostics, work is ongoing on a modified tool to measure ion energies and fluxes, even within the EUV beam itself; also, work is ongoing on an improved Residual Gas Analyzer.
In Metrology, for an in depth characterization of the dummy gate patterning for CFET devices, imec has prepared two wafers, etched with different dummy gate etch processes, for an extended characterization by the metrology partners and will be distributed to the metrology companies (NOVA, AMIL and NFI) during the 3rd period.
BRT concluded with the assessment of a novel laser-based X-ray source and decided to halt the development and instead focus on low energy X-ray fluorescence and reflectivity with in-house X-ray sources. PTB was in continuous exchange with BRT to find the best energy region for the analysis of thin films and nanostructured surfaces.
EXC in collaboration with BRT have reported initial results on thin TiN, using a prototype source and a standard polycapillary lens. The intensity gain is more than 2x compared to the SotA setup.
AMIL completed the integration of the new SEM review column to the system on E-beam metrology and inspection platform with improved imaging and throughput.
PRODRIVE defined next-gen image processing based on benchmarking of various next-gen metrology and inspection systems architectures.
PI have been developed novel stage for AMIL inspection tool and proposed a new piezo motor technology including a novel kinematic approach and sensor concept.
NOVA developed and tested the Next Generation of Spectral Interferometry [NGSI] channel successfully.
NFI developed probe based metrology algorithms to increase resolution and throughput and has accurately retain surface roughness information along the top surfaces, edges, and inclined walls of 3D structures.
KLA developed machine leaning base overlay for improved total measurements uncertainties.
Imec coordinated the first development of novel and refined metrology techniques for the assessment of EUV reticle degradation and produced a samples plan with partners with TNO, UPB and PTB.
In mask infrastructure, the automation of the ZEISS particle removal tool has been improved and the new manipulator stage has been deployed to all ZEISS PRT systems. Significant progress has been made improving reliability of the PRT (see Figure 4.1). UPB demonstrated the successful mounting and TEM analysis including EDX of AFM tips for particle removal (see Figure 4.2).
TNO is set to investigate key parameters for optimizing mask-level conditions. Sample preparation for this is ongoing.
On Process Technology, related to “Patterning solutions”, progress comprises the selection of resists for hNA 0.55NA EUV lithography, including the demonstration of first exposures on an hNA EUV scanner and this for both wet and dry resist technology (Figure 5.1).
Regarding “Device selection”, key results include the completion of process developments, culminating in the demonstration of electrical functional uni-channel CFET devices (Figure 5.2).
Related to “Performant MOL and BEOL” process development optimization yielded an electrical more mature Vertical-Horizontal-Vertical (VHV) scaling booster (Figure 5.3). Applying ion-beam etching (IBE), thin film binary compound interconnects (Figure 5.4) were successfully patterned. PLD (pulsed layer deposition) hardware was upgraded for depositions >550C; perovskite phase ‘only’ BiFeO3 deposition was demonstrated (Figure 5.5).
As of yet there are no publishable results beyond the state of the art in Lithography and Metrology.
In mask infrastructure, the ZEISS particle removal tool PRT allows removing soft particles from a photomask by combining a SEM and a nanomanipulator. The main advance beyond state of the art besides this combination is the reduction of the necessary operator inputs and by this the improvement of particle removal success and throughput. The measures for improving the reliability by preventing mask and tip damage directly improve the uptime of the tool.
TNO will go beyond state of the art by closer matching the test conditions to scanner-like conditions at mask level in the TNO EUV beamline and plasma setups. In addition, TNO and ZEISS will improve understanding of durability aspects of mask repair.
On Process Technology, results beyond state-of-the-art comprise mask design, including overlay markers for half field stitching, and the successful first exposures on 0.55NA hNA EUV scanner. Next generation materials, and hardware to tackle process development challenges related to CFET device integration. Demonstration of electrical functional uni-channel CFET device at aggressive pitch. Development of VHV scaling booster for 4Track logic cell lay-out, first patterning result of thin layer binary alloys. EDA solutions for backside signal routing. Development of a virtual fab model for assessing ecological footprint of chip manufacturing up till the level of packaging.
In mask infrastructure, the ZEISS particle removal tool PRT allows removing soft particles from a photomask by combining a SEM and a nanomanipulator. The main advance beyond state of the art besides this combination is the reduction of the necessary operator inputs and by this the improvement of particle removal success and throughput. The measures for improving the reliability by preventing mask and tip damage directly improve the uptime of the tool.
TNO will go beyond state of the art by closer matching the test conditions to scanner-like conditions at mask level in the TNO EUV beamline and plasma setups. In addition, TNO and ZEISS will improve understanding of durability aspects of mask repair.
On Process Technology, results beyond state-of-the-art comprise mask design, including overlay markers for half field stitching, and the successful first exposures on 0.55NA hNA EUV scanner. Next generation materials, and hardware to tackle process development challenges related to CFET device integration. Demonstration of electrical functional uni-channel CFET device at aggressive pitch. Development of VHV scaling booster for 4Track logic cell lay-out, first patterning result of thin layer binary alloys. EDA solutions for backside signal routing. Development of a virtual fab model for assessing ecological footprint of chip manufacturing up till the level of packaging.