Twinning for Excellence in Reliable Electronics

Informations projet

TWIN-RELECT

N° de convention de subvention: 101160314

DOI

10.3030/101160314

Date de signature de la CE 29 Avril 2024

Date de début 1 Octobre 2024

Date de fin 30 Septembre 2027

Financé au titre de

• Widening participation and spreading excellence

Coût total

Aucune donnée

Contribution de l’UE

€ 1 197 976,25

Coordonné par

PANEPISTIMIO THESSALIAS
Greece

CORDIS fournit des liens vers les livrables publics et les publications des projets HORIZON.

Les liens vers les livrables et les publications des projets du 7e PC, ainsi que les liens vers certains types de résultats spécifiques tels que les jeux de données et les logiciels, sont récupérés dynamiquement sur OpenAIRE .

Publications

Conference proceedings (12)

A Synthesis Toolflow for the Predictable Implementation of High-Performance Bundled-Data Asynchronous NoCs on FPGA

Auteurs: Giuseppe Chessa; Elena Bellodi; Michele Favalli; Davide Zoni; Davide Bertozzi
Publié dans: 2025 29th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 2025, ISSN 2643-1483
Éditeur: IEEE
DOI: 10.1109/ASYNC65240.2025.00013

Prediction of Single Event Transient Propagation Using Machine Learning Models

Auteurs: Marko Andjelkovic, Junchao Chen, Jelisaveta Aleksic, Vishnu Padmakumar, Milos Marjanovic, Nikolaos Zazatis, Trupti Ranjan Lenka, Danijel Dankovic, Christos Sotiriou, Fabian Vargas
Publié dans: 2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD), 2025
Éditeur: IEEE
DOI: 10.1109/SMACD65553.2025.11092057

Compact SER Models via Model Order Reduction of Diffusion-Based Charge Collection

Auteurs: Pavlos Stoikos, Olympia Axelou, Pelopidas Tsoumanis, Georgios-Ioannis Paliaroutis, George Floros
Publié dans: 2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD), 2025
Éditeur: IEEE
DOI: 10.1109/SMACD65553.2025.11092292

Design and Reliability Analysis of a Pipeline RISC-V Processor Core

Auteurs: Thiago H. Rausch, Wesley Grignani, Luigi Dilillo, and Douglas R. Melo
Publié dans: IEEE Latin-American Test Symp. (LATS), 2026, 2026
Éditeur: IEEE

Efficient TinyML Inference on a Fault-Tolerant RISC-V SoC with Vector Extension

Auteurs: Carolina Imianosky, Douglas A. Santos, Luigi Dilillo
Publié dans: 2025 10th International Workshop on Advances in Sensors and Interfaces (IWASI), 2025
Éditeur: IEEE
DOI: 10.1109/IWASI66786.2025.11121981

Multi-Partner Project: Twinning for Excellence in Reliable Electronics (TWIN-RELECT)

Auteurs: Andjelkovic, Marko; Vargas, Fabian; Krstic, Milos; Dilillo, Luigi; Michez, Alain; Wrobel, Frederic; Bertozzi, Davide; Luján, Mikel; Georgakidis, Christos; Chatzivangelis, Nikolaos; Tsilingiri, Katerina; Zazatis, Nikolaos Zazatis; Paliaroutis, Georgios Ioanis; Tsoumanis, Pelopidas; Sotiriou, Christos
Publié dans: 2025 Design, Automation & Test in Europe Conference (DATE), 2025, ISSN 1558-1101
Éditeur: IEEE
DOI: 10.23919/DATE64628.2025.10992721

Post-Placement Timing Optimisations on Asynchronous Designs

Auteurs: Dimitrios Tsalapatas, Nikolaos Chatzivangelis, Christos P. Sotiriou, Nikolaos Sketopoulos
Publié dans: 2025 29th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 2025
Éditeur: IEEE
DOI: 10.1109/ASYNC65240.2025.00025

Special Session Paper: Simulation Methodologies and Experiments for Reliability Analysis of Devices in Radiation Harsh Environments

Auteurs: Nikoloas Chatzivangelis, Nikoloas Zazatis, Wesley Grignani, Georgios-Ioannis Paliaroutis, Douglas A. Santos, Carolina Imianosky, Maria Kastriotou, Carlo Cazzaniga, Frédéric Wrobel, Alessandro Veronesi, Christos Sotiriou, Marko Andjelkovic, Fabian L. Vargas, Davide Bertozzi, Luigi Dilillo
Publié dans: 2025 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2025
Éditeur: IEEE
DOI: 10.1109/DFT66274.2025.11257502

Compact SER Models for Line-Source-Induced Charge Collection Using Model Order Reduction

Auteurs: Pavlos Stoikos, Olympia Axelou, Pelopidas Tsoumanis, Georgios-Ioannis Paliaroutis, Luigi Dilillo, Anuj Pathania, George Floros
Publié dans: 2025 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2025
Éditeur: IEEE
DOI: 10.1109/DFT66274.2025.11257486

Characterization of a Fault-Tolerant RISC-V SoC in an SRAM-Based FPGA under Proton Irradiation

Auteurs: Wesley Grignani, Douglas A. Santos, Carolina Imianosky, Douglas R. Melo, Frédéric Wrobel, and Luigi Dilillo
Publié dans: IEEE Latin-American Test Symp. (LATS), 2026, 2026
Éditeur: IEEE

Resilience Analysis of a Fault-Tolerant MPSoC Interconnection Architecture under SEU Fault Injection

Auteurs: Douglas A. Santos, Wesley Grignani, Carolina Imianosky, Douglas R. Melo, and Luigi Dilillo
Publié dans: IEEE Latin-American Test Symp. (LATS), 2025, 2025
Éditeur: IEEE

Fault Injection Attacks Based on Layout-Driven SER Analysis

Auteurs: Alexandra Takou, Pelopidas Tsoumanis, Georgios-Ioannis Paliaroutis, Nestor Evmorfopoulos, George Stamoulis
Publié dans: 2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD), 2025
Éditeur: IEEE
DOI: 10.1109/SMACD65553.2025.11092174

Peer reviewed articles (3)

UPSET: A Comprehensive Probabilistic Single Event Transient Analysis Flow for VLSI Circuits Using Static Timing Analysis

Auteurs: Christos Georgakidis, Dimitris Valiantzas, Nikolaos Chatzivangelis, Marko Andjelkovic, Christos Sotiriou, Milos Krstic
Publié dans: Electronics, Numéro 15, 2026, ISSN 2079-9292
Éditeur: MDPI AG
DOI: 10.3390/ELECTRONICS15040818

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Auteurs: Su, Zhe; Ramini, Simone; Coffen Marcolin, Demetra; Veronesi, Alessandro; Krstic, Milos; Indiveri, Giacomo; Bertozzi, Davide; Nowick, Steven M
Publié dans: IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2024, ISSN 2156-3357
Éditeur: IEEE
DOI: 10.5167/UZH-268876

Efficient Reliability-Aware Hardware Trojan Design and Insertion for SET-Induced Soft Error Attacks

Auteurs: Alexandra Takou, Georgios-Ioannis Paliaroutis, Pelopidas Tsoumanis, Marko Andjelkovic, Fabian Vargas, Nestor Evmorfopoulos, George Stamoulis
Publié dans: Electronics, Numéro 15, 2026, ISSN 2079-9292
Éditeur: MDPI AG
DOI: 10.3390/ELECTRONICS15020425