The transcription of CAD data to the physical layer of reticles, masks, or semiconductor substrates is done by postprocessor software that transfers the hierarchical CAD file into a machine format. Existing software explodes the data to a flat file, and with current techniques machine format file sizes extend to gigabytes and processing time stretches into weeks. In addition, as feature sizes become smaller, it is necessary to cope with the proximity effect in order to maintain critical dimensions.
The objective of VIP is to replace existing postprocessors by a product which retains hierarchies during data manipulation. The goal is to process memories (minimum 64 Mbit), ASICs (minimum 500K gate arrays), integrated optics devices and microsensors, building on the experience that one of the contractors has with computer-aided proximity correction. A particularly challenging target is the computation of a 64 Mbit DRAM on a mini-computer in less than 8 hours.
Graphical user interfaces have been defined for all types of software platforms in use, and data input formats obtained for commonly available e-beam writing systems. This tool also enhances data manipulation and improves productivity through the use of macros. Experiments have been conducted to understand the proximity effects when writing small lines, and the results are used to provide intelligent tuning of the proximity correction feature. Work on curve drawing features is being applied to allow writing of integrated optical elements.
Initial trials of the postprocessor data fracturing show huge savings in processor time over existing software. The software is capable of porting to a wide platform range, supporting a large number of e-beam writers.
The VIP postprocessor will be developed in line with the E-beam writers under development in the project FREE (5030). A key aim of VIP is the application of its results in silicon foundries.
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