Skip to main content
Aller à la page d’accueil de la Commission européenne (s’ouvre dans une nouvelle fenêtre)
français français
CORDIS - Résultats de la recherche de l’UE
CORDIS
Contenu archivé le 2024-05-28

Nanoscale Silicon-Aware Network-on-Chip Design Platform

Description du projet

Design of semiconductor components and electronic based miniaturised systems
The objective of this project is to develop an innovative network-on-chip oriented design platform constituting a toolkit for the construction of NoC-based multi-core systems in nanoscale technologies
The NaNoC project aims at developing an innovative design platform for future Network-on-Chip (NoC) based multi-core systems. This NaNoC design platform intends to master the design complexity of advanced microelectronic systems by enabling strict component oriented architectural design. A compositional approach to NoC design in future multi-core chips is out of the reach of current design methods and tools due to new design constraints. Requirements for co-design with high-level platform management frameworks facilitates a need for enhanced dynamism and flexibility in NoC composition (e.g. virtualization, power management, thermal management, application management). On the other hand, a higher degree of uncertainty originating from nanoscale integrated circuit fabrication technologies raises the need to build reliable systems out of unreliable components.The NaNoC design platform provides design methods and prototype tools to cope with both challenges and to make NoCs a mainstream interconnect backbone for effective system integration. The platform enables NoC component assembly at each layer of the design hierarchy. Therefore, design for manufacturability techniques and tools are developed to preserve yield in the presence of manufacturing defects and circuit performance/power variability.Above all, the NaNoC design platform fosters tight cooperation between system research, circuit design and process development by means of a silicon-aware decision making at each layer of the design hierarchy. In this direction, NaNoC not only provides a cross-layer approach to tackle composability challenges (e.g. physical design techniques for enhanced reliability combined with architecture-level techniques for fault containment), but also defines an exchange format for interoperability between design tools for cross-layer optimization. Interoperability between developed NoC design methods/prototype tools and mainstream design toolflows will also be pursued.

The NaNoC project aims at developing an innovative design platform for future Network-on-Chip (NoC) based multi-core systems. This NaNoC design platform intends to master the design complexity of advanced microelectronic systems by enabling strict component oriented architectural design. A compositional approach to NoC design in future multi-core chips is out of the reach of current design methods and tools due to new design constraints. Requirements for co-design with high-level platform management frameworks facilitates a need for enhanced dynamism and flexibility in NoC composition (e.g. virtualization, power management, thermal management, application management). On the other hand, a higher degree of uncertainty originating from nanoscale IC fabrication technologies raises the need to build reliable systems out of unreliable components.The NaNoC design platform provides design methods and prototype tools to cope with both challenges and to make NoCs a mainstream interconnect backbone for effective system integration. The platform enables NoC component assembly at each layer of the design hierarchy. Therefore, design for manufacturability techniques and tools are developed to preserve yield in the presence of manufacturing defects and circuit performance/power variability.Above all, the NaNoC design platform fosters the tight cooperation between system research, circuit design and process development by means of a silicon-aware decision making at each layer of the design hierarchy. In this direction, NaNoC not only provides a cross-layer approach to tackle composability challenges (e.g. physical design techniques for enhanced reliability combined with architecture-level techniques for fault containment), but also defines an exchange format for interoperability between design tools for cross-layer optimization. Interoperability between developed NoC design methods/prototype tools and mainstream design toolflows will also be pursued.

Champ scientifique (EuroSciVoc)

CORDIS classe les projets avec EuroSciVoc, une taxonomie multilingue des domaines scientifiques, grâce à un processus semi-automatique basé sur des techniques TLN. Voir: Le vocabulaire scientifique européen.

Vous devez vous identifier ou vous inscrire pour utiliser cette fonction

Programme(s)

Programmes de financement pluriannuels qui définissent les priorités de l’UE en matière de recherche et d’innovation.

Thème(s)

Les appels à propositions sont divisés en thèmes. Un thème définit un sujet ou un domaine spécifique dans le cadre duquel les candidats peuvent soumettre des propositions. La description d’un thème comprend sa portée spécifique et l’impact attendu du projet financé.

Appel à propositions

Procédure par laquelle les candidats sont invités à soumettre des propositions de projet en vue de bénéficier d’un financement de l’UE.

FP7-ICT-2009-4
Voir d’autres projets de cet appel

Régime de financement

Régime de financement (ou «type d’action») à l’intérieur d’un programme présentant des caractéristiques communes. Le régime de financement précise le champ d’application de ce qui est financé, le taux de remboursement, les critères d’évaluation spécifiques pour bénéficier du financement et les formes simplifiées de couverture des coûts, telles que les montants forfaitaires.

CP - Collaborative project (generic)

Coordinateur

UNIVERSITAT POLITECNICA DE VALENCIA
Contribution de l’UE
€ 513 763,00
Adresse
CAMINO DE VERA SN EDIFICIO 3A
46022 VALENCIA
Espagne

Voir sur la carte

Région
Este Comunitat Valenciana Valencia/València
Type d’activité
Higher or Secondary Education Establishments
Liens
Coût total

Les coûts totaux encourus par l’organisation concernée pour participer au projet, y compris les coûts directs et indirects. Ce montant est un sous-ensemble du budget global du projet.

Aucune donnée

Participants (7)

Mon livret 0 0