Final Report Summary - CIC (Reliable communication in integrated circuits)
It is hard to imagine a life without integrated circuits: they are at the heart of computers, digital sound systems, industrial monitoring and control systems, communication networks, and innumerably more. To satisfy society's needs, there is a vast demand for faster and ever increasingly complex integrated circuits. In such integrated circuits, interconnects responsible for the communication between different parts of a microprocessor become a critical bottleneck. To address interconnect performance limitations, the international technology roadmap for semiconductors (ITRS) suggests, inter alia, to use signal coding techniques. Thus, instead of sending a sequence of bits directly from one part of a microprocessor to another, one first describes it by a longer sequence of bits (this action is called encoding, and the device that performs it is referred to as encoder), which is then transmitted via the interconnect to another part of the processor, where the encoding is reversed (this action is called decoding, and the device that performs it is referred to as decoder). The encoding introduces redundancy, which can be exploited to protect the signal better against physical disturbances.
The design of good encoders and decoders is a challenging task since it involves many parameters that have to be optimised. To better understand how to optimally design encoders and decoders, we have studied the information-theoretic limits of signal coding in interconnects. Specifically, we have studied the channel capacity of interconnects, defined as the largest data rate at which communication with arbitrarily low error probability is feasible. It describes how much redundancy optimal encoders and decoders are required to transfer data reliably and it is thus an important benchmark for the design of encoders and decoders.
In this project, we have investigated two limiting factors in interconnects: digitisation at the decoder side and restrictions on the signal constellation at the encoder side. Digitisation is necessary since the signal observed at the decoder is an analogue waveform, whereas the decoder typically employs digital signal processing techniques. Consequently, the signal first needs to be sampled and then quantised using an analogue-to-digital converter (ADC). While the effects of digitisation are negligible if a high-resolution ADC is employed, such ADCs are usually not practical for interconnects, which have a large bandwidth and the ADCs therefore need to operate at high sampling rates.
To better understand the effects of digitisation on the performance limits of interconnects, we have studied the channel capacity of the additive white Gaussian noise (AWGN) channel when the channel output is sampled and quantised using a one-bit quantiser, i.e. each sample is described by one bit. For a symmetric quantiser (which produces 1 if its input is nonnegative and produces -1 otherwise), we have shown that increasing the sampling rate improves channel capacity. Thus, to obtain performance gains, the system designer can choose to increase the sampling rate.
For the case where we are restricted to sample at Nyquist rate, i.e. at twice the bandwidth, we have demonstrated that a symmetric quantiser is suboptimal with respect to channel capacity, and that, by using the optimal one-bit quantiser, power gains of up to 2 decibels are possible. Furthermore, we have shown that the optimal one-bit quantiser is a threshold quantiser with nonzero threshold, i.e. a quantiser that produces 1 if its input is above a given threshold and produces -1 otherwise. Such a quantiser can be constructed simply by connecting an adder in front of the symmetric quantiser. Thus, with little effort substantial performance gains can be attained. Unfortunately, we have also shown that if the system operates at spectral efficiencies above 0.02 bits per second per Hertz, then the gains from employing a quantiser other than the symmetric one are negligible. Thus, if the interconnects operate at spectral efficiencies above 0.02 bits per second per Hertz, then a symmetric quantiser is essentially optimal.
The following conclusions drawn from the above analyses will help the system designer to decide how to best digitise the signals at the decoder side of interconnects. If the interconnect operates at spectral efficiencies below 0.02 bits per second per Hertz, then sampling at Nyquist rate and using a threshold quantiser with optimised threshold is a promising strategy, since substantial performance gains can be obtained with little effort. On the other hand, if the interconnect operates at spectral efficiencies above 0.02 bits per second per Hertz, then a symmetric quantiser is essentially optimal and performance gains can only be obtained by increasing the sampling rate or the quantiser resolution, i.e. by quantising the received signal with more than one bit.
In a second phase of the project, we have focused on limitations at the encoder side. It is well-known that pulse-amplitude modulation (PAM) and constellations where signal points are distributed according to a Gaussian distribution are optimal in the sense that they achieve the channel capacity of the AWGN channel. However, for such constellations the signal points are spread over the whole real line. This would require the encoder not only to be able to produce very large symbols, but also to treat every signal point in the same way, irrespective of its value. In practice, every electronic circuits has nonlinearities, which results in large signal points being more strongly distorted than small signal points. Therefore, it is common in practical systems to use signal constellations with a finite support, i.e. where signal points are not spread over the whole real line but only over a finite interval. Unfortunately, this causes a loss with respect to channel capacity. We have derived a simple formula to quantify this loss as a function of the signal support. While several approximations that also quantify the capacity loss exist, to the best of our knowledge, our formula is the first one being derived rigorously. Furthermore, its simplicity suggests that a generalisation to more complicated modulation schemes such as trellis coded modulation (TCM) or bit-interleaved coded modulation (BICM) is within our grasp. The formula will allow the system designer to optimise over the signal constellation, supporting them in choosing the signal constellation that maximises channel capacity for a given constraint on the signal support.
In summary, we have demonstrated how digitisation and restrictions on the signal constellation affect channel capacity. Our results provide helpful guidelines for system designers to implement signal coding techniques in practical integrated circuits, thus aiding system designers in tackling the performance limitations of interconnects. Moreover, digitisation and signal-constellation restrictions are also relevant limitations in other communication scenarios, particularly if power- and cost-efficient encoders and decoders have to be used, as for example in wireless networks where communication takes place between mobile devices. Thus, the results obtained in this project are not only of interest for communication in integrated circuits, but apply also to more general communication problems.
The design of good encoders and decoders is a challenging task since it involves many parameters that have to be optimised. To better understand how to optimally design encoders and decoders, we have studied the information-theoretic limits of signal coding in interconnects. Specifically, we have studied the channel capacity of interconnects, defined as the largest data rate at which communication with arbitrarily low error probability is feasible. It describes how much redundancy optimal encoders and decoders are required to transfer data reliably and it is thus an important benchmark for the design of encoders and decoders.
In this project, we have investigated two limiting factors in interconnects: digitisation at the decoder side and restrictions on the signal constellation at the encoder side. Digitisation is necessary since the signal observed at the decoder is an analogue waveform, whereas the decoder typically employs digital signal processing techniques. Consequently, the signal first needs to be sampled and then quantised using an analogue-to-digital converter (ADC). While the effects of digitisation are negligible if a high-resolution ADC is employed, such ADCs are usually not practical for interconnects, which have a large bandwidth and the ADCs therefore need to operate at high sampling rates.
To better understand the effects of digitisation on the performance limits of interconnects, we have studied the channel capacity of the additive white Gaussian noise (AWGN) channel when the channel output is sampled and quantised using a one-bit quantiser, i.e. each sample is described by one bit. For a symmetric quantiser (which produces 1 if its input is nonnegative and produces -1 otherwise), we have shown that increasing the sampling rate improves channel capacity. Thus, to obtain performance gains, the system designer can choose to increase the sampling rate.
For the case where we are restricted to sample at Nyquist rate, i.e. at twice the bandwidth, we have demonstrated that a symmetric quantiser is suboptimal with respect to channel capacity, and that, by using the optimal one-bit quantiser, power gains of up to 2 decibels are possible. Furthermore, we have shown that the optimal one-bit quantiser is a threshold quantiser with nonzero threshold, i.e. a quantiser that produces 1 if its input is above a given threshold and produces -1 otherwise. Such a quantiser can be constructed simply by connecting an adder in front of the symmetric quantiser. Thus, with little effort substantial performance gains can be attained. Unfortunately, we have also shown that if the system operates at spectral efficiencies above 0.02 bits per second per Hertz, then the gains from employing a quantiser other than the symmetric one are negligible. Thus, if the interconnects operate at spectral efficiencies above 0.02 bits per second per Hertz, then a symmetric quantiser is essentially optimal.
The following conclusions drawn from the above analyses will help the system designer to decide how to best digitise the signals at the decoder side of interconnects. If the interconnect operates at spectral efficiencies below 0.02 bits per second per Hertz, then sampling at Nyquist rate and using a threshold quantiser with optimised threshold is a promising strategy, since substantial performance gains can be obtained with little effort. On the other hand, if the interconnect operates at spectral efficiencies above 0.02 bits per second per Hertz, then a symmetric quantiser is essentially optimal and performance gains can only be obtained by increasing the sampling rate or the quantiser resolution, i.e. by quantising the received signal with more than one bit.
In a second phase of the project, we have focused on limitations at the encoder side. It is well-known that pulse-amplitude modulation (PAM) and constellations where signal points are distributed according to a Gaussian distribution are optimal in the sense that they achieve the channel capacity of the AWGN channel. However, for such constellations the signal points are spread over the whole real line. This would require the encoder not only to be able to produce very large symbols, but also to treat every signal point in the same way, irrespective of its value. In practice, every electronic circuits has nonlinearities, which results in large signal points being more strongly distorted than small signal points. Therefore, it is common in practical systems to use signal constellations with a finite support, i.e. where signal points are not spread over the whole real line but only over a finite interval. Unfortunately, this causes a loss with respect to channel capacity. We have derived a simple formula to quantify this loss as a function of the signal support. While several approximations that also quantify the capacity loss exist, to the best of our knowledge, our formula is the first one being derived rigorously. Furthermore, its simplicity suggests that a generalisation to more complicated modulation schemes such as trellis coded modulation (TCM) or bit-interleaved coded modulation (BICM) is within our grasp. The formula will allow the system designer to optimise over the signal constellation, supporting them in choosing the signal constellation that maximises channel capacity for a given constraint on the signal support.
In summary, we have demonstrated how digitisation and restrictions on the signal constellation affect channel capacity. Our results provide helpful guidelines for system designers to implement signal coding techniques in practical integrated circuits, thus aiding system designers in tackling the performance limitations of interconnects. Moreover, digitisation and signal-constellation restrictions are also relevant limitations in other communication scenarios, particularly if power- and cost-efficient encoders and decoders have to be used, as for example in wireless networks where communication takes place between mobile devices. Thus, the results obtained in this project are not only of interest for communication in integrated circuits, but apply also to more general communication problems.