Skip to main content
Go to the home page of the European Commission (opens in new window)
English English
CORDIS - EU research results
CORDIS
Content archived on 2024-04-19

Device Simulation for Smart Integrated Systems

Objective

The aims of DESSIS are to:

- enhance the set of tools currently available to the smart-power system designer by making device-level and mixed-mode circuit/device simulation feasible within the circuit design environment
- enhance currently available 3-D device simulation codes to account for all the physical mechanisms important for the operation of EPROM and flash EEPROM memory devices.
Circuit and device equations have been merged, so that power devices can be simulated within their circuit environment, with the appropriate dimensionality required by their geometrical structure. To date, the simulation code SIMUL handles multiple 1-dimensional, 2-dimensional and 3-dimensional devices within the same circuit, as well as SPICE-like device models for both passive and active components. SIMUL supports both direct current (DC) and time dependent circuit analyses with no restriction on circuit topology, thus making it possible to simulate the switching behaviour of complex power devices, accounting for the input driving, as well as the output load and clamping circuitry. SIMUL's physical model supports the heat flow equation in addition to the drift diffusion model of current transport; hence, the influence of device self heating is fully accounted for.

Physical level multidimensional device analysis tools suitable for power and floating gate device simulations have been developed. To this purpose, the hydrodynamic model of current transport in semiconductors and the heat flow equation have been implemented within the 3-dimensional simulator HFIELDS, thus allowing for a very general energy transport model which overcomes previous simplifying assumptions such as that of a local thermal equilibrium between lattice and carriers, or that of an isothermal lattice. The code currently supports the Fowler-Nordheim tunnelling mechanism across the gate oxide, while the implementation of the band to band tunnelling is scheduled in the near future. Finally, hot electron and hot hole injection into the gate of erasable programmable read only memory (EPROM) and electrically erasable programmable read only memory (EEPROM) cells will be supported.
These goals are being pursued by:

- Merging circuit/device equations, so that power devices can be simulated within their circuit environment, with the appropriate dimensionality required by their geometrical structure. To date, the simulation code SIMUL handles multiple 1-D, 2-D and 3-D devices within the same circuit, as well as SPICE-like device models for both passive and active components. SIMUL supports both D.C. and time-dependent circuit analyses with no restriction on circuit topology, thus making it possible to simulate the switching behaviour of complex power devices, such as IGBTs or GTOs, accounting for the input driving, as well as the output load and clamping circuitry. SIMUL's physical model supports the heat-flow equation in addition to the drift-diffusion model of current transport: hence, the influence of device self-heating is fully accounted for.

- Developing physical-level multi-dimensional device analysis tools suitable for power- and floating-gate-device simulations. To this purpose, the hydrodynamic model of current transport in semiconductors and the heat-flow equation have been implemented within the 3-D simulator HFIELDS, thus allowing for a very general energy-transport model which overcomes previous simplifying assumptions such as that of a local thermal equilibrium between lattice and carriers, or that of an isothermal lattice. The code currently supports the Fowler-Nordheim tunnelling mechanism across the gate oxide, while the implementation of the band-to-band tunnelling is scheduled in the near future. Finally, hot-electron and hot-hole injection into the gate of EPROM and EEPROM cells will be supported.

- Developing a common User's Simulation Environment (USE) for user-friendly structure definition and mesh generation. The latter will conform to international standards and rely upon a general Standard Process Representation (SPR) and Standard Wafer Representation (SWP). Both SIMUL and HFIELDS will be supported by USE; thus, tool integration will fully be achieved within the DESSIS Project. Also, interface with process-modelling tools to be developed and/or enhanced within the PROMPT Project will be pursued, with the aim of generating a state-of-the-art TCAD simulation environment.

Fields of science (EuroSciVoc)

CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques. See: The European Science Vocabulary.

You need to log in or register to use this function

Programme(s)

Multi-annual funding programmes that define the EU’s priorities for research and innovation.

Topic(s)

Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.

Data not available

Call for proposal

Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.

Data not available

Funding Scheme

Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.

Data not available

Coordinator

Università degli Studi di Bologna
EU contribution
No data
Address
Viale Risorgimento 2
40136 Bologna
Italy

See on map

Total cost

The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.

No data

Participants (3)

My booklet 0 0