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Seven Nanometer Technology

Periodic Reporting for period 2 - SeNaTe (Seven Nanometer Technology)

Reporting period: 2016-04-01 to 2017-03-31

The goal of the project is to enable European suppliers to develop tool capabilities for the next generation 7nm IC technology which will enable the industry to keep on Moore’s law projection and direction which presently aim at 7nm manufacturing in 2018. The project aims at the demonstration of 7nm IC technology integration on real devices in the Advanced Patterning Center using the imec pilot line. Innovative device architecture is used and a lithographic platform for EUV and immersion technology is demonstrated as well as the application of advanced process and holistic metrology platforms, new materials and mask infrastructure. FEOL and BEOL modules are developed and fully characterized with the different metrology to evaluate the best options for patterning and process steps, minimizing cost, increasing performance, limiting variability and supporting 7nm module readiness in accordance with the industry needs and the ITRS roadmap.
The integration of the large subsystems including the optical system of the first EUV lithographic system for the 7nm node by ASML is finished, full system integration progresses well, and first test wafers are exposed, demonstrating a good performance of the system on a set of relevant imaging parameters.
DEMCON realized and tested a new qualification tool for the next generation positioning module.
Fraunhofer’s main acievements are reduction of layer roughness, improvement of stress uniformity on flat and strongly curved substrate surfaces, extension of mask deposition technique for fabrication of free-form thickness profiles to substrates with up to 300 mm diameter.
A complete process line to manufacture X-large DOE’s is installed at IMS and a first 17” DOE is demonstrated.
VDL-ETG supports the integration and qualification of EUV source systems.
Zeiss continues the development of the anamorphic POB. First advanced manufacturing equipment has been delivered and installed, and is ready for process development.
Productivity aspect which relates to stand alone inline metrology tools and holistic metrology got developed further by the main metro companies and their suppliers.
Samples from the N7 pilot line contributed significantly to process characterization efforts and allow the development of beyond state of the art components of metrology companies.
Different process platforms and upgrades are installed at imec and are available to perform process development for the 7nm node:
First light has been achieved by TNO for EUV Beam Line (EBL2) that intends to mimic more high volume manufacturing oriented source power in the range 250-1000W.
The implementation of the dedicated “RBI” (reticle backside inspection) module in the EUV lithography tool confirmed to be an important asset.
Using the experimental characterization of the current Ta-based absorber a rigorous simulation model was calibrated and validated against printed wafer results exhibiting strong M3D effects.
In the alternative pellicle membrane development imec continued to pursue the development of carbon nanomaterials with the focus on carbon nanotubes. ASML’s work concentrated on graphene, SiN, and high-temperature ceramics. Twente University develops cap materials and the associated coating process, to improve the emissivity of the membranes developed at ASML.
Fraunhofer IISB has completed the modelling activities showing the impact on the aerial image of a particle on a pellicle membrane.
Developing the mask maintenance infrastructure by Suss has started on the MaskTrackPro and a test has been executed demonstrating the compatibility of its handling with a pelliclized reticle.
TNO finished the design of the particle scanner and all parts are manufactured and progresses with the tool integration.
ASYS delivered a new ultra-clean handler robot which TNO has integrated in the reticle handler of the particle scanner.
ECP worked on the implementation of a new specific cleaning line addressed to EUV-pods.
Imec has run a further evaluation for front-side particle adders via the established technique of wafer inspection and subsequent analysis for additional repeaters, which indicate newly added particles.
The design style evaluation performed at the start of the project resulted in a first set of design rules and process assumptions. The 193i-multi patterning vs single exposure EUV pattering benchmark was completed for all the critical layers. From this patterning options validation the final set of design rules was deduced.
For the BEOL integration using the new maskset, first electrical results were generated. For FEOL and MOL integration, all required process steps for the respective modules have been developed.
The assessment of alternative device architectures for 7nm node respectively SOI based Fin devices and gate all around (GAA) devices are addressed.
Availability of the first EUV lithographic system for the 7nm node enhances ASML’s unique position. Zeiss advances the development of a novelty in lithography technology with the design of an anamorphic projection lens.
The various metrology modules and tools which are developed in the project enable higher throughput, precision and accuracy level of critical measurements in the 7nm process flow and improve both the monitoring and process correction feedback flows.
New films and processes are developed by Applied Materials for N7 hard mask and CD shrinkage, for low k dielectric, barrier, Cu fill and Cu CMP, for extension ion implantation and work-function metals deposition, and for selective etch to enable GAA. The majority of developed hardware and processes are expected to be employed in future N7 production.
The adaptation and application of ultrathin, conformal and uniform PEALD spacer materials redefines continuously the state of the art. The horizontal GAA process development by ASM is highly innovative and applied for the first time. Ultrathin (3nm) and closed low temperature SiN spacers processes highly challenging.
All by Lam targeted applications, except the Co Cap and dielectric barrier progress have reached a maturity level that enables them to be integrated in a full N7 flow. Also the Lam achievements in low material loss and improved uniformity across the wafer improve device repeatability and performance.
The expected potential impact of the planned experiments on the EBL2 developed by TNO is a better understanding of mask (+ pellicle) degradation, based on a dedicated beam-line facility, printing performance monitoring and dedicated mask metrology.
The need for an alternative absorber material on EUV masks has been expressed by the industry. The simulation efforts support the change in EUV absorber material to reduce the M3D effects for current and future industry nodes.
The consortium members demonstrate that within the consortium the required competences on device simulation, design rules assessment, hardware development, process development, module integration are available to produce silicon devices which meet the morphological specifications for the 7nm node technology.
8.5nm fins @ 22.5nm pitch using 193i SAQP multiple patterning
3D Model of Test Vehicle for Self-Aligned Contact (SAC) Etch
Metallization of 16nm line/space metal 1 lines using CVD Mn/Ru barrier liner / Cu plating technology
The image shows the partially equipped source vessel during final integration
Result of 7nm Fin Patterning in FEOL via Self-Aligned Quadruple Patterning (SAQP)
Highlights from FEOL and MOL module development
Holistic metrology reference and modeling can be seen in the image
EUV Single Exposure based block patterning using metal containing photo resist
Intermediate result of 7nm BEOL Patterning and Metallization
Gate All Around module development
Virtual fabrication flow of SAQP for N7_N5 Silicon Fins