European Packaging, Assembly and Test Pilot for Manufacturing of Advanced System-in-Package

Project Information

EuroPAT-MASIP

Grant agreement ID: 737497

DOI

10.3030/737497

Project closed

EC signature date 12 May 2017

Start date 1 April 2017

End date 30 June 2021

Funded under

• INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)

Total cost

€ 29 734 972,50

EU contribution

€ 7 203 644,58

Coordinated by

ATEP - AMKOR TECHNOLOGY PORTUGAL SA
Portugal

Periodic Reporting for period 3 - EuroPAT-MASIP (European Packaging, Assembly and Test Pilot for Manufacturing of Advanced System-in-Package)

Reporting period: 2019-09-01 to 2021-06-30

Summary of the context and overall objectives of the project

EuroPAT-MASIP strives to increase the competitiveness and the global market share of the European semiconductor industry by fostering the competence and capabilities of semiconductor packaging. Steps will be taken to facilitate the collaboration of European semiconductor and MEMS packaging ecosystem to assuring a co-creation network after the project. The project consortium will actively promote the capabilities and the related ecosystem, feeding also to attracting talent and academic education issues. Ultimately, the project results will increase the attractiveness for private investments and talent by developing and promoting the key capabilities to match the future needs of European industries and emerging technology drivers.

EuroPAT-MASiP will develop:
- Modelling, design and simulation of packaging-related key features and challenges
- The key packaging technologies, equipment and materials
- Heterogeneous (3D) integration of the smart system building blocks
- More than Moore (MtM)
- System in Package (SiP) and
- Test strategy, including metrology, methods and equipment, reliability and failure analysis.

Reinforcing the European semiconductor manufacturing position is reached through the following strategic objectives of EuroPAT-MASIP:
1. Consolidating and extending the leadership in semiconductor processing know-how, by developing and fostering packaging related technological and manufacturing building blocks, serving all the relevant industrial sectors
2. Accelerating the manufacturing uptake of the new technologies and shortening time-to-market by demonstrating the new capabilities in industrial need-based Application Pilots
3. Increasing the competitiveness and global market share of the European semiconductor industry by fostering the competences and capabilities of European semiconductor packaging

Work performed from the beginning of the project to the end of the period covered by the report and main results achieved so far

During the first period six application pilots (APs) were defined in terms of functionality, requirements, and technologies to be used. The work began on application pilot specifications bearing in mind the needs of modelling, reliability & failure testing, and validation.

AP1: Automotive Combined Inertial Sensor
AP2: Tyre Sensor
AP3: WL Camera for Automotive
AP4: Silicon Photomultiplier
AP5: Radar Chipset
AP6: WLAN Front-End IC

as well as three technology learning vehicles (TLVs):
TLV1: Sensor/MEMS Minituriazation Concept Validation
TLV2: 300mm CMOS Wafer, and Recon Wafer Plasma Dicing
TLV3: Next Generation Fine-Pitch FO-Packaging (RDL-First Approach).

During the second period
- All package specifications for APs were finalized
- New innovative processes, newly developed technologies and developed test strategies were applied
- Packaging activities prior to the building of the first or second functional prototypes is ongoing and
- The first or second prototypes for three APs were prepared

During the final period
-Prototype tests going on or finalized in most of the APs
-Development of processes was executed and success criteria achieved
-A method to create a validated scheme of virtual prototyping of SiP products based on FOWLP technologies was developed (and presented conferences and industry events)
-New test methods and metrology development were achieved

Exploitation and dissemination of the results
-Not all the APs got finalized by the end of the project: however, their development continues by their owners
-Many of the (originally minor) R&D related topics (such those that relate to method or metrology development) actually became more successful than anticipated, resulting in totally new business opportunities to their owners
-Project results have been presented in 25 events, 10 conference articles and 1 journal article
-The project has lead to 3 more ECSEL projects and 8 patent applications

Progress beyond the state of the art and expected potential impact (including the socio-economic impact and the wider societal implications of the project so far)

Progress beyond the state of the art during the project duration has been in the following fields:
- Universal design for reliability platform for all FO-WLP products (Fan-out wafer level packaging) technologies
- Development and demonstration of technologies and utilization of innovative processes, such as defect free plasma dicing, self-alignment and pick & place processes
- Development of methods, equipment and failure analysis systems, such as High-Resolution X-Ray Computed Tomography.

Most of these have been presented in international conferences (& their related conference articles), full list of them being available on the project website.

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