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Extending Coherence for Hardware-Driven Optimizations in Multicore Architectures

Publications

ITSLF: Inter-Thread Store-to-Load Forwarding in Simultaneous Multithreading

Author(s): Josué Feliú, Alberto Ros, Manuel E. Acacio, Stefanos Kaxiras
Published in: International Symposium on Microarchitecture (MICRO), 54th, 2021, Page(s) 1296-1308, ISBN 978-1-4503-8557-2
Publisher: IEEE/ACM
DOI: 10.1145/3466752.3480086

BL∪E: A Timely, IP-based Data Prefetcher

Author(s): Alberto Ros
Published in: The 1st ML-Based Data Prefetching Competition. ML for Computer Architecture and Systems, 1st, 2021, Page(s) 4
Publisher: Google

A Cost-Effective Entangling Prefetcher for Instructions

Author(s): Alberto Ros, Alexandra Jimborean
Published in: International Symposium on Computer Architecture (ISCA), 48th, 2021, Page(s) 99-111, ISBN 978-1-6654-3333-4
Publisher: ACM
DOI: 10.1109/isca52012.2021.00017

Regional Out-of-Order Writes in Total Store Order

Author(s): Sawan Singh, Alexandra Jimborean, Alberto Ros
Published in: Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques, 2020, Page(s) 205-216, ISBN 9781450380751
Publisher: ACM
DOI: 10.1145/3410463.3414645

Boosting Store Buffer Efficiency with Store-Prefetch Bursts

Author(s): Juan M. Cebrian, Stefanos Kaxiras, Alberto Ros
Published in: 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2020, Page(s) 568-580, ISBN 978-1-7281-7383-2
Publisher: IEEE
DOI: 10.1109/micro50266.2020.00054

Splash-4: Improving Scalability with Lock-Free Constructs

Author(s): Eduardo José Gómez-Hernández, Ruixiang Shao, Christos Sakalis, Stefanos Kaxiras, Alberto Ros
Published in: International Symposium on Performance Analysis of Systems and Software (ISPASS),, 2021, 2021, Page(s) 235-236, ISBN 978-1-7281-8643-6
Publisher: IEEE
DOI: 10.1109/ispass51385.2021.00044

Speculative Enforcement of Store Atomicity

Author(s): Alberto Ros, Stefanos Kaxiras
Published in: 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2020, Page(s) 555-567, ISBN 978-1-7281-7383-2
Publisher: IEEE
DOI: 10.1109/micro50266.2020.00053

Clearing the Shadows - Recovering Lost Performance for Invisible Speculative Execution through HW/SW Co-Design

Author(s): Kim-Anh Tran, Christos Sakalis, Magnus Själander, Alberto Ros, Stefanos Kaxiras, Alexandra Jimborean
Published in: Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques, 2020, Page(s) 241-254, ISBN 9781450380751
Publisher: ACM
DOI: 10.1145/3410463.3414640

Efficient, Distributed, and Non-Speculative Multi-Address Atomic Operations

Author(s): Eduardo José Gómez-Hernández, Rubén Titos-Gil, Juan Manuel Cebrián, Stefanos Kaxiras, Alberto Ros
Published in: International Symposium on Microarchitecture (MICRO), 54th, 2021, Page(s) 337-349, ISBN 978-1-4503-8557-2
Publisher: IEEE/ACM
DOI: 10.1145/3466752.3480073

TSOPER: Efficient Coherence-Based Strict Persistency

Author(s): Per Ekemark, Yuan Yao, Alberto Ros, Konstantinos Sagonas, Stefanos Kaxiras
Published in: Symposium on High Performance Computer Architecture (HPCA), 27th, 2021, Page(s) 125-138, ISBN 978-1-6654-4670-9
Publisher: IEEE
DOI: 10.1109/hpca51647.2021.00021

The Entangling Instruction Prefetcher

Author(s): Alberto Ros, Alexandra Jimborean
Published in: The 1st Instruction Prefetching Championship (IPC-1), 2020, Page(s) 4
Publisher: NC State University

Compiler-Assisted Compaction/Restoration of SIMD Instructions

Author(s): Juan Manuel Cebrian, Thibaud Balem, Adrian Barredo, Marc Casas, Miquel Moreto, Alberto Ros, Alexandra Jimborean
Published in: IEEE Transactions on Parallel and Distributed Systems (TPDS), 33 (4), 2022, Page(s) 779-791, ISSN 1045-9219
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tpds.2021.3091015

The Entangling Instruction Prefetcher

Author(s): Alberto Ros, Alexandra Jimborean
Published in: IEEE Computer Architecture Letters, 19/2, 2020, Page(s) 84-87, ISSN 1556-6056
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/lca.2020.3002947

DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional Memory

Author(s): Rubén Titos-Gil, Ricardo Fernández-Pascual, Manuel E. Acacio, Alberto Ros
Published in: IEEE Transactions on Parallel and Distributed Systems (TPDS), 33 (1), 2022, Page(s) 1--13, ISSN 1045-9219
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tpds.2021.3085210

Analysing Software Prefetching Opportunities in Hardware Transactional Memory

Author(s): Marina Shimchenko, Rubén Titos-Gil, Ricardo Fernández-Pascual, Manuel E. Acacio, Stefanos Kaxiras, Alberto Ros, Alexandra Jimborean
Published in: Journal of Supercomputing (SUPE), 78, 2022, Page(s) 919–944, ISSN 0920-8542
Publisher: Kluwer Academic Publishers
DOI: 10.1007/s11227-021-03897-z