A new approach to design wireless receivers

Projektinformationen

High-Risk-No-Gain

ID Finanzhilfevereinbarung: 834389

DOI

10.3030/834389

Projekt abgeschlossen

EK-Unterschriftsdatum 11 April 2019

Startdatum 1 September 2019

Enddatum 31 August 2024

Finanziert unter

• EXCELLENT SCIENCE - European Research Council (ERC)

Gesamtkosten

€ 2 475 665,00

EU-Beitrag

€ 2 475 665,00

Koordiniert durch

UNIVERSITEIT TWENTE
Netherlands

Periodic Reporting for period 4 - High-Risk-No-Gain (A new approach to design wireless receivers)

Berichtszeitraum: 2024-03-01 bis 2024-08-31

Zusammenfassung vom Kontext und den Gesamtzielen des Projekts

The project aims to solve the problem of wireless communication hardware (radios) which become too complex and expensive to allow future high-speed communications.

Wireless communication is extremely important for society as we all rely on it. During the past decades, the speed and quality of wireless communication have improved a lot, however extrapolating the current IC technology to the future will result in very expensive and complex radio. The reason is that in future technology nodes, the supply voltage will be so low, that linear amplifiers may not be possible anymore. This project aims at a radically different approach.

The objective is to design a receiver, which does not use any "gain", i.e. active amplification of weak antenna signals. Normally this is required to process the weak signals into larger ones, so they can be easily converted to digital. However, in that case, also strong interference is amplified, resulting in a deterioration of the received signal. By refraining from using gain, the latter effect will not happen and cost can be saved on filters, etc. however the analog to digital conversion needs to be completely reconsidered.

This project is of a high-risk nature, but if we succeed the benefits will be immense: cheaper and smaller radios, and more things connected to the internet without waste of energy. The overall objective is to investigate if we can design receivers and other analog interfaces without the use of active linear gain. This will make operation in future IC technologies possible.

Arbeit, die ab Beginn des Projekts bis zum Ende des durch den Bericht erfassten Berichtszeitraums geleistet wurde, und die wichtigsten bis dahin erzielten Ergebnisse

6 Ph.D. students have worked on this project. They all started during the first half of the calendar year 2020.
After a literature study and several "wild" design iterations, we defined a clear path forward.
Work packages are:
1) an N-path filter antenna interface, with extreme selectivity; 2) an
ultra-low-noise ADC ; 3) a digital reflector to reflect unwanted signals arriving at the antenna; 4) precise timing circuits with far-beyond state-of-the-art timing accuracy to clock the N-path filter.

We also created a theoretical framework in which we have proven that it is possible to work without active linear gain if you make the noise level of the analog-to-digital converter low enough. We have proven that the no-gain approach can in principle be equally energy efficient as the classical approach with gain. In theory, the fundamental energy limit is precisely equal!
This insight was made public during my keynote presentation at the ISSCC 2024 (International Solid-State Circuits Conference) in February 2024. A YouTube recording of my presentation is available to the general public.

We have designed, fabricated, and evaluated 7 test chips to demonstrate this no-gain concept for various circuits in a wireless receiver. At the end phase of this project, we are now in the process of writing publications about these chips.

Fortschritte, die über den aktuellen Stand der Technik hinausgehen und voraussichtliche potenzielle Auswirkungen (einschließlich der bis dato erzielten sozioökonomischen Auswirkungen und weiter gefassten gesellschaftlichen Auswirkungen des Projekts)

We have developed a new IC design strategy for analog and RF front ends that does not need active linear gain.
This will enable linear receivers at low supply voltages for future CMOS nodes, without requiring classical analog transistor properties.

test chip of a "no gain" receiver